diff --git a/BC1C.ATWP b/BC1C.ATWP index 1b58a40..8136544 100644 --- a/BC1C.ATWP +++ b/BC1C.ATWP @@ -20,9 +20,9 @@ - - - + + + @@ -33,9 +33,9 @@ - - - + + + @@ -71,11 +71,15 @@ - + - + - + + + + + @@ -128,13 +132,14 @@ 0;0;0 0;0;0 0;0;0 - 0;0;0 - 0;0;0 - 0;0;0 + 1;1;0 + 1;1;0 + 1;1;0 0;0;0 0;0;0 0;0;0 0;0;0 + 1;0;0 0;0;0 0;0;0 0;0;0 @@ -205,9 +210,7 @@ true 0x200 0x400 - true - true - C:/Users/ForgotDoge/Desktop/AT32_Work_Bench_V1.0.03/AT32F403A_407_Firmware_Library_V2.1.8.zip - + false + diff --git a/project/inc/at32f403a_407_conf.h b/project/inc/at32f403a_407_conf.h index 572cb00..d6ef237 100644 --- a/project/inc/at32f403a_407_conf.h +++ b/project/inc/at32f403a_407_conf.h @@ -61,7 +61,7 @@ extern "C" { #define DEBUG_MODULE_ENABLED /*#define DMA_MODULE_ENABLED----------------------*/ /*#define EMAC_MODULE_ENABLED---------------------*/ -#define EXINT_MODULE_ENABLED +/*#define EXINT_MODULE_ENABLED--------------------*/ #define FLASH_MODULE_ENABLED #define GPIO_MODULE_ENABLED #define I2C_MODULE_ENABLED diff --git a/project/inc/at32f403a_407_int.h b/project/inc/at32f403a_407_int.h index 79e5908..58c0d6c 100644 --- a/project/inc/at32f403a_407_int.h +++ b/project/inc/at32f403a_407_int.h @@ -65,6 +65,10 @@ void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); +void USART1_IRQHandler(void); +void USART2_IRQHandler(void); +void USART3_IRQHandler(void); +void TMR6_GLOBAL_IRQHandler(void); /* add user code begin exported functions */ /* add user code end exported functions */ diff --git a/project/inc/at32f403a_407_wk_config.h b/project/inc/at32f403a_407_wk_config.h index 5fa83a1..f0dd260 100644 --- a/project/inc/at32f403a_407_wk_config.h +++ b/project/inc/at32f403a_407_wk_config.h @@ -86,9 +86,6 @@ extern "C" { /* init can2 function. */ void wk_can2_init(void); - /* init pwc function. */ - void wk_pwc_init(void); - /* init usart1 function. */ void wk_usart1_init(void); @@ -98,6 +95,9 @@ extern "C" { /* init usart3 function. */ void wk_usart3_init(void); + /* init tmr6 function. */ + void wk_tmr6_init(void); + /* init tmr8 function. */ void wk_tmr8_init(void); diff --git a/project/src/at32f403a_407_int.c b/project/src/at32f403a_407_int.c index fbbcbdd..e1d17ff 100644 --- a/project/src/at32f403a_407_int.c +++ b/project/src/at32f403a_407_int.c @@ -1,27 +1,27 @@ /* add user code begin Header */ /** - ************************************************************************** - * @file at32f403a_407_int.c - * @brief main interrupt service routines. - ************************************************************************** - * Copyright notice & Disclaimer - * - * The software Board Support Package (BSP) that is made available to - * download from Artery official website is the copyrighted work of Artery. - * Artery authorizes customers to use, copy, and distribute the BSP - * software and its related documentation for the purpose of design and - * development in conjunction with Artery microcontrollers. Use of the - * software is governed by this copyright notice and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, - * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, - * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR - * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, - * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. - * - ************************************************************************** - */ + ************************************************************************** + * @file at32f403a_407_int.c + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ /* add user code end Header */ /* includes ------------------------------------------------------------------*/ @@ -29,7 +29,7 @@ /* private includes ----------------------------------------------------------*/ /* add user code begin private includes */ - +#include "by_debug.h" /* add user code end private includes */ /* private typedef -----------------------------------------------------------*/ @@ -68,140 +68,202 @@ /* add user code end external variables */ /** - * @brief this function handles nmi exception. - * @param none - * @retval none - */ + * @brief this function handles nmi exception. + * @param none + * @retval none + */ void NMI_Handler(void) { - /* add user code begin NonMaskableInt_IRQ 0 */ + /* add user code begin NonMaskableInt_IRQ 0 */ - /* add user code end NonMaskableInt_IRQ 0 */ + /* add user code end NonMaskableInt_IRQ 0 */ - /* add user code begin NonMaskableInt_IRQ 1 */ + /* add user code begin NonMaskableInt_IRQ 1 */ - /* add user code end NonMaskableInt_IRQ 1 */ + /* add user code end NonMaskableInt_IRQ 1 */ } /** - * @brief this function handles hard fault exception. - * @param none - * @retval none - */ + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ void HardFault_Handler(void) { - /* add user code begin HardFault_IRQ 0 */ + /* add user code begin HardFault_IRQ 0 */ - /* add user code end HardFault_IRQ 0 */ - /* go to infinite loop when hard fault exception occurs */ - while (1) - { - /* add user code begin W1_HardFault_IRQ 0 */ + /* add user code end HardFault_IRQ 0 */ + /* go to infinite loop when hard fault exception occurs */ + while (1) { + /* add user code begin W1_HardFault_IRQ 0 */ - /* add user code end W1_HardFault_IRQ 0 */ - } + /* add user code end W1_HardFault_IRQ 0 */ + } } /** - * @brief this function handles memory manage exception. - * @param none - * @retval none - */ + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ void MemManage_Handler(void) { - /* add user code begin MemoryManagement_IRQ 0 */ + /* add user code begin MemoryManagement_IRQ 0 */ - /* add user code end MemoryManagement_IRQ 0 */ - /* go to infinite loop when memory manage exception occurs */ - while (1) - { - /* add user code begin W1_MemoryManagement_IRQ 0 */ + /* add user code end MemoryManagement_IRQ 0 */ + /* go to infinite loop when memory manage exception occurs */ + while (1) { + /* add user code begin W1_MemoryManagement_IRQ 0 */ - /* add user code end W1_MemoryManagement_IRQ 0 */ - } + /* add user code end W1_MemoryManagement_IRQ 0 */ + } } /** - * @brief this function handles bus fault exception. - * @param none - * @retval none - */ + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ void BusFault_Handler(void) { - /* add user code begin BusFault_IRQ 0 */ + /* add user code begin BusFault_IRQ 0 */ - /* add user code end BusFault_IRQ 0 */ - /* go to infinite loop when bus fault exception occurs */ - while (1) - { - /* add user code begin W1_BusFault_IRQ 0 */ + /* add user code end BusFault_IRQ 0 */ + /* go to infinite loop when bus fault exception occurs */ + while (1) { + /* add user code begin W1_BusFault_IRQ 0 */ - /* add user code end W1_BusFault_IRQ 0 */ - } + /* add user code end W1_BusFault_IRQ 0 */ + } } /** - * @brief this function handles usage fault exception. - * @param none - * @retval none - */ + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ void UsageFault_Handler(void) { - /* add user code begin UsageFault_IRQ 0 */ + /* add user code begin UsageFault_IRQ 0 */ - /* add user code end UsageFault_IRQ 0 */ - /* go to infinite loop when usage fault exception occurs */ - while (1) - { - /* add user code begin W1_UsageFault_IRQ 0 */ + /* add user code end UsageFault_IRQ 0 */ + /* go to infinite loop when usage fault exception occurs */ + while (1) { + /* add user code begin W1_UsageFault_IRQ 0 */ - /* add user code end W1_UsageFault_IRQ 0 */ - } + /* add user code end W1_UsageFault_IRQ 0 */ + } } /** - * @brief this function handles svcall exception. - * @param none - * @retval none - */ + * @brief this function handles svcall exception. + * @param none + * @retval none + */ void SVC_Handler(void) { - /* add user code begin SVCall_IRQ 0 */ + /* add user code begin SVCall_IRQ 0 */ - /* add user code end SVCall_IRQ 0 */ - /* add user code begin SVCall_IRQ 1 */ + /* add user code end SVCall_IRQ 0 */ + /* add user code begin SVCall_IRQ 1 */ - /* add user code end SVCall_IRQ 1 */ + /* add user code end SVCall_IRQ 1 */ } /** - * @brief this function handles debug monitor exception. - * @param none - * @retval none - */ + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ void DebugMon_Handler(void) { - /* add user code begin DebugMonitor_IRQ 0 */ + /* add user code begin DebugMonitor_IRQ 0 */ - /* add user code end DebugMonitor_IRQ 0 */ - /* add user code begin DebugMonitor_IRQ 1 */ + /* add user code end DebugMonitor_IRQ 0 */ + /* add user code begin DebugMonitor_IRQ 1 */ - /* add user code end DebugMonitor_IRQ 1 */ + /* add user code end DebugMonitor_IRQ 1 */ } /** - * @brief this function handles pendsv_handler exception. - * @param none - * @retval none - */ + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ void PendSV_Handler(void) { - /* add user code begin PendSV_IRQ 0 */ + /* add user code begin PendSV_IRQ 0 */ - /* add user code end PendSV_IRQ 0 */ - /* add user code begin PendSV_IRQ 1 */ + /* add user code end PendSV_IRQ 0 */ + /* add user code begin PendSV_IRQ 1 */ - /* add user code end PendSV_IRQ 1 */ + /* add user code end PendSV_IRQ 1 */ +} + +/** + * @brief this function handles USART1 handler. + * @param none + * @retval none + */ +void USART1_IRQHandler(void) +{ + /* add user code begin USART1_IRQ 0 */ + + /* add user code end USART1_IRQ 0 */ + /* add user code begin USART1_IRQ 1 */ + + /* add user code end USART1_IRQ 1 */ +} + +/** + * @brief this function handles USART2 handler. + * @param none + * @retval none + */ +void USART2_IRQHandler(void) +{ + /* add user code begin USART2_IRQ 0 */ + if (SET == usart_flag_get(USART2, USART_RDBF_FLAG)) { + usart_data_receive(USART2); + usart_flag_clear(USART2, USART_RDBF_FLAG); + } + /* add user code end USART2_IRQ 0 */ + /* add user code begin USART2_IRQ 1 */ + + /* add user code end USART2_IRQ 1 */ +} + +/** + * @brief this function handles USART3 handler. + * @param none + * @retval none + */ +void USART3_IRQHandler(void) +{ + /* add user code begin USART3_IRQ 0 */ + + /* add user code end USART3_IRQ 0 */ + /* add user code begin USART3_IRQ 1 */ + + /* add user code end USART3_IRQ 1 */ +} + +/** + * @brief this function handles TMR6 handler. + * @param none + * @retval none + */ +void TMR6_GLOBAL_IRQHandler(void) +{ + /* add user code begin TMR6_GLOBAL_IRQ 0 */ + static uint64_t i = 0; + if (SET == tmr_flag_get(TMR6, TMR_OVF_FLAG)) { + tmr_flag_clear(TMR6, TMR_OVF_FLAG); + } + /* add user code end TMR6_GLOBAL_IRQ 0 */ + /* add user code begin TMR6_GLOBAL_IRQ 1 */ + + /* add user code end TMR6_GLOBAL_IRQ 1 */ } /* add user code begin 1 */ diff --git a/project/src/at32f403a_407_wk_config.c b/project/src/at32f403a_407_wk_config.c index 62666bf..5701f96 100644 --- a/project/src/at32f403a_407_wk_config.c +++ b/project/src/at32f403a_407_wk_config.c @@ -1,27 +1,27 @@ /* add user code begin Header */ /** - ************************************************************************** - * @file at32f403a_407_wk_config.c - * @brief work bench config program - ************************************************************************** - * Copyright notice & Disclaimer - * - * The software Board Support Package (BSP) that is made available to - * download from Artery official website is the copyrighted work of Artery. - * Artery authorizes customers to use, copy, and distribute the BSP - * software and its related documentation for the purpose of design and - * development in conjunction with Artery microcontrollers. Use of the - * software is governed by this copyright notice and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, - * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, - * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR - * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, - * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. - * - ************************************************************************** - */ + ************************************************************************** + * @file at32f403a_407_wk_config.c + * @brief work bench config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ /* add user code end Header */ #include "at32f403a_407_wk_config.h" @@ -62,959 +62,996 @@ /* add user code end 0 */ /** - * @brief system clock config program - * @note the system clock is configured as follow: - * system clock (sclk) = hick / 12 * pll_mult - * system clock source = pll (hick) - * - hext = HEXT_VALUE - * - sclk = 240000000 - * - ahbdiv = 1 - * - ahbclk = 240000000 - * - apb1div = 2 - * - apb1clk = 120000000 - * - apb2div = 2 - * - apb2clk = 120000000 - * - pll_mult = 60 - * - pll_range = GT72MHZ (greater than 72 mhz) - * @param none - * @retval none - */ + * @brief system clock config program + * @note the system clock is configured as follow: + * system clock (sclk) = hick / 12 * pll_mult + * system clock source = HICK_VALUE + * - hext = HEXT_VALUE + * - sclk = 240000000 + * - ahbdiv = 1 + * - ahbclk = 240000000 + * - apb1div = 2 + * - apb1clk = 120000000 + * - apb2div = 2 + * - apb2clk = 120000000 + * - pll_mult = 60 + * - pll_range = GT72MHZ (greater than 72 mhz) + * @param none + * @retval none + */ void wk_system_clock_config(void) { - /* reset crm */ - crm_reset(); + /* reset crm */ + crm_reset(); - /* enable lick */ - crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE); + /* enable lick */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE); - /* wait till lick is ready */ - while(crm_flag_get(CRM_LICK_STABLE_FLAG) != SET) - { - } + /* wait till lick is ready */ + while (crm_flag_get(CRM_LICK_STABLE_FLAG) != SET) { + } - /* enable hext */ - crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + /* enable hext */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); - /* wait till hext is ready */ - while(crm_hext_stable_wait() == ERROR) - { - } + /* wait till hext is ready */ + while (crm_hext_stable_wait() == ERROR) { + } - /* enable hick */ - crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE); + /* enable hick */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE); - /* wait till hick is ready */ - while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET) - { - } + /* wait till hick is ready */ + while (crm_flag_get(CRM_HICK_STABLE_FLAG) != SET) { + } - /* config pll clock resource */ - crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ); + /* config pll clock resource */ + crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ); - /* enable pll */ - crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); - /* wait till pll is ready */ - while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) - { - } + /* wait till pll is ready */ + while (crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) { + } - /* config ahbclk */ - crm_ahb_div_set(CRM_AHB_DIV_1); + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); - /* config apb2clk, the maximum frequency of APB2 clock is 120 MHz */ - crm_apb2_div_set(CRM_APB2_DIV_2); + /* config apb2clk, the maximum frequency of APB2 clock is 120 MHz */ + crm_apb2_div_set(CRM_APB2_DIV_2); - /* config apb1clk, the maximum frequency of APB1 clock is 120 MHz */ - crm_apb1_div_set(CRM_APB1_DIV_2); + /* config apb1clk, the maximum frequency of APB1 clock is 120 MHz */ + crm_apb1_div_set(CRM_APB1_DIV_2); - /* enable auto step mode */ - crm_auto_step_mode_enable(TRUE); + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); - /* select pll as system clock source */ - crm_sysclk_switch(CRM_SCLK_PLL); + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); - /* wait till pll is used as system clock source */ - while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) - { - } + /* wait till pll is used as system clock source */ + while (crm_sysclk_switch_status_get() != CRM_SCLK_PLL) { + } - /* disable auto step mode */ - crm_auto_step_mode_enable(FALSE); + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); - /* update system_core_clock global variable */ - system_core_clock_update(); + /* update system_core_clock global variable */ + system_core_clock_update(); } /** - * @brief config periph clock - * @param none - * @retval none - */ + * @brief config periph clock + * @param none + * @retval none + */ void wk_periph_clock_config(void) { - /* enable iomux periph clock */ - crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + /* enable iomux periph clock */ + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); - /* enable gpioa periph clock */ - crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + /* enable gpioa periph clock */ + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); - /* enable gpiob periph clock */ - crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + /* enable gpiob periph clock */ + crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - /* enable gpioc periph clock */ - crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); + /* enable gpioc periph clock */ + crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); - /* enable gpiod periph clock */ - crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE); + /* enable gpiod periph clock */ + crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE); - /* enable adc1 periph clock */ - crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); + /* enable adc1 periph clock */ + crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); - /* enable tmr8 periph clock */ - crm_periph_clock_enable(CRM_TMR8_PERIPH_CLOCK, TRUE); + /* enable tmr8 periph clock */ + crm_periph_clock_enable(CRM_TMR8_PERIPH_CLOCK, TRUE); - /* enable usart1 periph clock */ - crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE); + /* enable usart1 periph clock */ + crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE); - /* enable tmr11 periph clock */ - crm_periph_clock_enable(CRM_TMR11_PERIPH_CLOCK, TRUE); + /* enable tmr11 periph clock */ + crm_periph_clock_enable(CRM_TMR11_PERIPH_CLOCK, TRUE); - /* enable tmr12 periph clock */ - crm_periph_clock_enable(CRM_TMR12_PERIPH_CLOCK, TRUE); + /* enable tmr6 periph clock */ + crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE); - /* enable usart2 periph clock */ - crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE); + /* enable tmr12 periph clock */ + crm_periph_clock_enable(CRM_TMR12_PERIPH_CLOCK, TRUE); - /* enable usart3 periph clock */ - crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE); + /* enable usart2 periph clock */ + crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE); - /* enable i2c1 periph clock */ - crm_periph_clock_enable(CRM_I2C1_PERIPH_CLOCK, TRUE); + /* enable usart3 periph clock */ + crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE); - /* enable i2c2 periph clock */ - crm_periph_clock_enable(CRM_I2C2_PERIPH_CLOCK, TRUE); + /* enable i2c1 periph clock */ + crm_periph_clock_enable(CRM_I2C1_PERIPH_CLOCK, TRUE); - /* enable can1 periph clock */ - crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE); + /* enable i2c2 periph clock */ + crm_periph_clock_enable(CRM_I2C2_PERIPH_CLOCK, TRUE); - /* enable can2 periph clock */ - crm_periph_clock_enable(CRM_CAN2_PERIPH_CLOCK, TRUE); + /* enable can1 periph clock */ + crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE); - /* enable pwc periph clock */ - crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + /* enable can2 periph clock */ + crm_periph_clock_enable(CRM_CAN2_PERIPH_CLOCK, TRUE); } /** - * @brief init debug function. - * @param none - * @retval none - */ + * @brief init debug function. + * @param none + * @retval none + */ void wk_debug_config(void) { - /* jtag-dp disabled and sw-dp enabled */ - gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); + /* jtag-dp disabled and sw-dp enabled */ + gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); } /** - * @brief nvic config - * @param none - * @retval none - */ + * @brief nvic config + * @param none + * @retval none + */ void wk_nvic_config(void) { - nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + + nvic_irq_enable(USART1_IRQn, 1, 0); + nvic_irq_enable(USART2_IRQn, 1, 0); + nvic_irq_enable(USART3_IRQn, 1, 0); + nvic_irq_enable(TMR6_GLOBAL_IRQn, 0, 0); } /** - * @brief init gpio_input/gpio_output/gpio_analog/eventout function. - * @param none - * @retval none - */ + * @brief init gpio_input/gpio_output/gpio_analog/eventout function. + * @param none + * @retval none + */ void wk_gpio_config(void) { - gpio_init_type gpio_init_struct; - gpio_default_para_init(&gpio_init_struct); + /* add user code begin gpio_config 0 */ - /* gpio input config */ - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /* add user code end gpio_config 0 */ - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_2; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOD, &gpio_init_struct); + gpio_init_type gpio_init_struct; + gpio_default_para_init(&gpio_init_struct); - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_3 | GPIO_PINS_4 | GPIO_PINS_5; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOB, &gpio_init_struct); + /* add user code begin gpio_config 1 */ - /* gpio output config */ - gpio_bits_reset(GPIOC, GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3); + /* add user code end gpio_config 1 */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOC, &gpio_init_struct); + /* gpio input config */ + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); + + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_2; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOD, &gpio_init_struct); + + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_3 | GPIO_PINS_4 | GPIO_PINS_5; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOB, &gpio_init_struct); + + /* gpio output config */ + gpio_bits_reset(GPIOC, GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3); + + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOC, &gpio_init_struct); + + /* add user code begin gpio_config 2 */ + + /* add user code end gpio_config 2 */ } /** - * @brief init i2c1 function. - * @param none - * @retval none - */ + * @brief init i2c1 function. + * @param none + * @retval none + */ void wk_i2c1_init(void) { - /* add user code begin i2c1_init 0 */ + /* add user code begin i2c1_init 0 */ - /* add user code end i2c1_init 0 */ + /* add user code end i2c1_init 0 */ - gpio_init_type gpio_init_struct; + gpio_init_type gpio_init_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_default_para_init(&gpio_init_struct); - /* add user code begin i2c1_init 1 */ + /* add user code begin i2c1_init 1 */ - /* add user code end i2c1_init 1 */ + /* add user code end i2c1_init 1 */ - /* configure the SCL pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_6; - gpio_init(GPIOB, &gpio_init_struct); + /* configure the SCL pin */ + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_pins = GPIO_PINS_6; + gpio_init(GPIOB, &gpio_init_struct); - /* configure the SDA pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOB, &gpio_init_struct); + /* configure the SDA pin */ + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_pins = GPIO_PINS_7; + gpio_init(GPIOB, &gpio_init_struct); - i2c_init(I2C1, I2C_FSMODE_DUTY_2_1, 100000); - i2c_own_address1_set(I2C1, I2C_ADDRESS_MODE_7BIT, 0x0); - i2c_ack_enable(I2C1, TRUE); - i2c_clock_stretch_enable(I2C1, TRUE); - i2c_general_call_enable(I2C1, FALSE); + i2c_init(I2C1, I2C_FSMODE_DUTY_2_1, 100000); + i2c_own_address1_set(I2C1, I2C_ADDRESS_MODE_7BIT, 0x0); + i2c_ack_enable(I2C1, TRUE); + i2c_clock_stretch_enable(I2C1, TRUE); + i2c_general_call_enable(I2C1, FALSE); - i2c_enable(I2C1, TRUE); + i2c_enable(I2C1, TRUE); - /* add user code begin i2c1_init 2 */ + /* add user code begin i2c1_init 2 */ - /* add user code end i2c1_init 2 */ + /* add user code end i2c1_init 2 */ } /** - * @brief init i2c2 function. - * @param none - * @retval none - */ + * @brief init i2c2 function. + * @param none + * @retval none + */ void wk_i2c2_init(void) { - /* add user code begin i2c2_init 0 */ + /* add user code begin i2c2_init 0 */ - /* add user code end i2c2_init 0 */ + /* add user code end i2c2_init 0 */ - gpio_init_type gpio_init_struct; + gpio_init_type gpio_init_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_default_para_init(&gpio_init_struct); - /* add user code begin i2c2_init 1 */ + /* add user code begin i2c2_init 1 */ - /* add user code end i2c2_init 1 */ - - /* configure the SCL pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_10; - gpio_init(GPIOB, &gpio_init_struct); + /* add user code end i2c2_init 1 */ - /* configure the SDA pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_11; - gpio_init(GPIOB, &gpio_init_struct); + /* configure the SCL pin */ + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_pins = GPIO_PINS_10; + gpio_init(GPIOB, &gpio_init_struct); - i2c_init(I2C2, I2C_FSMODE_DUTY_2_1, 100000); - i2c_own_address1_set(I2C2, I2C_ADDRESS_MODE_7BIT, 0x0); - i2c_ack_enable(I2C2, TRUE); - i2c_clock_stretch_enable(I2C2, TRUE); - i2c_general_call_enable(I2C2, FALSE); + /* configure the SDA pin */ + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_pins = GPIO_PINS_11; + gpio_init(GPIOB, &gpio_init_struct); - i2c_enable(I2C2, TRUE); + i2c_init(I2C2, I2C_FSMODE_DUTY_2_1, 100000); + i2c_own_address1_set(I2C2, I2C_ADDRESS_MODE_7BIT, 0x0); + i2c_ack_enable(I2C2, TRUE); + i2c_clock_stretch_enable(I2C2, TRUE); + i2c_general_call_enable(I2C2, FALSE); - /* add user code begin i2c2_init 2 */ + i2c_enable(I2C2, TRUE); - /* add user code end i2c2_init 2 */ + /* add user code begin i2c2_init 2 */ + + /* add user code end i2c2_init 2 */ } /** - * @brief init pwc function. - * @param none - * @retval none - */ -void wk_pwc_init(void) -{ - /* add user code begin pwc_init 0 */ - - /* add user code end pwc_init 0 */ - - exint_init_type exint_init_struct; - - /* add user code begin pwc_init 1 */ - - /* add user code end pwc_init 1 */ - - /* enable power voltage monitor */ - pwc_power_voltage_monitor_enable(TRUE); - - exint_default_para_init(&exint_init_struct); - exint_init_struct.line_enable = TRUE; - exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT; - exint_init_struct.line_select = EXINT_LINE_16; - exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE; - exint_init(&exint_init_struct); - - /** - * Users need to configure PWC interrupt functions according to the actual application. - * 1. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file. - * --void PVM_IRQHandler (void) - */ - - /* add user code begin pwc_init 2 */ - - /* add user code end pwc_init 2 */ -} - -/** - * @brief init usart1 function - * @param none - * @retval none - */ + * @brief init usart1 function + * @param none + * @retval none + */ void wk_usart1_init(void) { - /* add user code begin usart1_init 0 */ + /* add user code begin usart1_init 0 */ - /* add user code end usart1_init 0 */ + /* add user code end usart1_init 0 */ - gpio_init_type gpio_init_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_init_type gpio_init_struct; + gpio_default_para_init(&gpio_init_struct); - /* add user code begin usart1_init 1 */ + /* add user code begin usart1_init 1 */ - /* add user code end usart1_init 1 */ + /* add user code end usart1_init 1 */ - /* configure the TX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_pins = GPIO_PINS_9; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /* configure the TX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_9; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); - /* configure the RX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_10; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /* configure the RX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_10; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); - /* configure param */ - usart_init(USART1, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); - usart_transmitter_enable(USART1, TRUE); - usart_receiver_enable(USART1, TRUE); - usart_parity_selection_config(USART1, USART_PARITY_NONE); + /* configure param */ + usart_init(USART1, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); + usart_transmitter_enable(USART1, TRUE); + usart_receiver_enable(USART1, TRUE); + usart_parity_selection_config(USART1, USART_PARITY_NONE); - usart_hardware_flow_control_set(USART1, USART_HARDWARE_FLOW_NONE); + usart_hardware_flow_control_set(USART1, USART_HARDWARE_FLOW_NONE); - usart_enable(USART1, TRUE); + /** + * Users need to configure USART1 interrupt functions according to the actual application. + * 1. Call the below function to enable the corresponding USART1 interrupt. + * --usart_interrupt_enable(...) + * 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file. + * --void USART1_IRQHandler(void) + */ - /* add user code begin usart1_init 2 */ + usart_enable(USART1, TRUE); - /* add user code end usart1_init 2 */ + /* add user code begin usart1_init 2 */ + + /* add user code end usart1_init 2 */ } /** - * @brief init usart2 function - * @param none - * @retval none - */ + * @brief init usart2 function + * @param none + * @retval none + */ void wk_usart2_init(void) { - /* add user code begin usart2_init 0 */ + /* add user code begin usart2_init 0 */ - /* add user code end usart2_init 0 */ + /* add user code end usart2_init 0 */ - gpio_init_type gpio_init_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_init_type gpio_init_struct; + gpio_default_para_init(&gpio_init_struct); - /* add user code begin usart2_init 1 */ + /* add user code begin usart2_init 1 */ - /* add user code end usart2_init 1 */ + /* add user code end usart2_init 1 */ - /* configure the TX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_pins = GPIO_PINS_2; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /* configure the TX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_2; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); - /* configure the RX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_3; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /* configure the RX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_3; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); - /* configure param */ - usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); - usart_transmitter_enable(USART2, TRUE); - usart_receiver_enable(USART2, TRUE); - usart_parity_selection_config(USART2, USART_PARITY_NONE); + /* configure param */ + usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); + usart_transmitter_enable(USART2, TRUE); + usart_receiver_enable(USART2, TRUE); + usart_parity_selection_config(USART2, USART_PARITY_NONE); - usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_NONE); + usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_NONE); - usart_enable(USART2, TRUE); + /** + * Users need to configure USART2 interrupt functions according to the actual application. + * 1. Call the below function to enable the corresponding USART2 interrupt. + * --usart_interrupt_enable(...) + * 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file. + * --void USART2_IRQHandler(void) + */ - /* add user code begin usart2_init 2 */ + usart_enable(USART2, TRUE); - /* add user code end usart2_init 2 */ + /* add user code begin usart2_init 2 */ + usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE); + /* add user code end usart2_init 2 */ } /** - * @brief init usart3 function - * @param none - * @retval none - */ + * @brief init usart3 function + * @param none + * @retval none + */ void wk_usart3_init(void) { - /* add user code begin usart3_init 0 */ + /* add user code begin usart3_init 0 */ - /* add user code end usart3_init 0 */ + /* add user code end usart3_init 0 */ - gpio_init_type gpio_init_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_init_type gpio_init_struct; + gpio_default_para_init(&gpio_init_struct); - /* add user code begin usart3_init 1 */ + /* add user code begin usart3_init 1 */ - /* add user code end usart3_init 1 */ + /* add user code end usart3_init 1 */ - /* configure the TX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_pins = GPIO_PINS_10; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOC, &gpio_init_struct); + /* configure the TX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_10; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOC, &gpio_init_struct); - /* configure the RX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_11; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOC, &gpio_init_struct); + /* configure the RX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_11; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOC, &gpio_init_struct); - gpio_pin_remap_config(USART3_GMUX_0001, TRUE); + gpio_pin_remap_config(USART3_GMUX_0001, TRUE); - /* configure param */ - usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); - usart_transmitter_enable(USART3, TRUE); - usart_receiver_enable(USART3, TRUE); - usart_parity_selection_config(USART3, USART_PARITY_NONE); + /* configure param */ + usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); + usart_transmitter_enable(USART3, TRUE); + usart_receiver_enable(USART3, TRUE); + usart_parity_selection_config(USART3, USART_PARITY_NONE); - usart_hardware_flow_control_set(USART3, USART_HARDWARE_FLOW_NONE); + usart_hardware_flow_control_set(USART3, USART_HARDWARE_FLOW_NONE); - usart_enable(USART3, TRUE); + /** + * Users need to configure USART3 interrupt functions according to the actual application. + * 1. Call the below function to enable the corresponding USART3 interrupt. + * --usart_interrupt_enable(...) + * 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file. + * --void USART3_IRQHandler(void) + */ - /* add user code begin usart3_init 2 */ + usart_enable(USART3, TRUE); - /* add user code end usart3_init 2 */ + /* add user code begin usart3_init 2 */ + + /* add user code end usart3_init 2 */ } /** - * @brief init tmr8 function. - * @param none - * @retval none - */ + * @brief init tmr6 function. + * @param none + * @retval none + */ +void wk_tmr6_init(void) +{ + /* add user code begin tmr6_init 0 */ + + /* add user code end tmr6_init 0 */ + + /* add user code begin tmr6_init 1 */ + + /* add user code end tmr6_init 1 */ + + /* configure counter settings */ + tmr_base_init(TMR6, 47999, 4999); + tmr_cnt_dir_set(TMR6, TMR_COUNT_UP); + tmr_period_buffer_enable(TMR6, FALSE); + + /* configure primary mode settings */ + tmr_primary_mode_select(TMR6, TMR_PRIMARY_SEL_RESET); + + tmr_counter_enable(TMR6, TRUE); + + /** + * Users need to configure TMR6 interrupt functions according to the actual application. + * 1. Call the below function to enable the corresponding TMR6 interrupt. + * --tmr_interrupt_enable(...) + * 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file. + * --void TMR6_GLOBAL_IRQHandler(void) + */ + + /* add user code begin tmr6_init 2 */ + tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE); + /* add user code end tmr6_init 2 */ +} + +/** + * @brief init tmr8 function. + * @param none + * @retval none + */ void wk_tmr8_init(void) { - /* add user code begin tmr8_init 0 */ + /* add user code begin tmr8_init 0 */ - /* add user code end tmr8_init 0 */ + /* add user code end tmr8_init 0 */ - gpio_init_type gpio_init_struct; - tmr_output_config_type tmr_output_struct; - tmr_brkdt_config_type tmr_brkdt_struct; + gpio_init_type gpio_init_struct; + tmr_output_config_type tmr_output_struct; + tmr_brkdt_config_type tmr_brkdt_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_default_para_init(&gpio_init_struct); - /* add user code begin tmr8_init 1 */ + /* add user code begin tmr8_init 1 */ - /* add user code end tmr8_init 1 */ + /* add user code end tmr8_init 1 */ - /* configure the CH1 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_6; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); + /* configure the CH1 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_6; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOC, &gpio_init_struct); - /* configure the CH2 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_7; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); + /* configure the CH2 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_7; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOC, &gpio_init_struct); - /* configure the CH3 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_8; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); + /* configure the CH3 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_8; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOC, &gpio_init_struct); - /* configure the CH4 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_9; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); + /* configure the CH4 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_9; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOC, &gpio_init_struct); - /* configure counter settings */ - tmr_base_init(TMR8, 65535, 0); - tmr_cnt_dir_set(TMR8, TMR_COUNT_UP); - tmr_clock_source_div_set(TMR8, TMR_CLOCK_DIV1); - tmr_repetition_counter_set(TMR8, 0); - tmr_period_buffer_enable(TMR8, FALSE); + /* configure counter settings */ + tmr_base_init(TMR8, 65535, 0); + tmr_cnt_dir_set(TMR8, TMR_COUNT_UP); + tmr_clock_source_div_set(TMR8, TMR_CLOCK_DIV1); + tmr_repetition_counter_set(TMR8, 0); + tmr_period_buffer_enable(TMR8, FALSE); - /* configure primary mode settings */ - tmr_sub_sync_mode_set(TMR8, FALSE); - tmr_primary_mode_select(TMR8, TMR_PRIMARY_SEL_RESET); + /* configure primary mode settings */ + tmr_sub_sync_mode_set(TMR8, FALSE); + tmr_primary_mode_select(TMR8, TMR_PRIMARY_SEL_RESET); - /* configure channel 1 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_1, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_1, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_1, FALSE); + /* configure channel 1 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_1, &tmr_output_struct); + tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_1, 0); + tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_1, FALSE); - /* configure channel 2 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_2, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_2, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_2, FALSE); + /* configure channel 2 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_2, &tmr_output_struct); + tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_2, 0); + tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_2, FALSE); - /* configure channel 3 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_3, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_3, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_3, FALSE); + /* configure channel 3 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_3, &tmr_output_struct); + tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_3, 0); + tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_3, FALSE); - /* configure channel 4 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_4, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_4, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_4, FALSE); + /* configure channel 4 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_4, &tmr_output_struct); + tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_4, 0); + tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_4, FALSE); - /* configure break and dead-time settings */ - tmr_brkdt_struct.brk_enable = FALSE; - tmr_brkdt_struct.auto_output_enable = FALSE; - tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW; - tmr_brkdt_struct.fcsoen_state = FALSE; - tmr_brkdt_struct.fcsodis_state = FALSE; - tmr_brkdt_struct.wp_level = TMR_WP_OFF; - tmr_brkdt_struct.deadtime = 0; - tmr_brkdt_config(TMR8, &tmr_brkdt_struct); + /* configure break and dead-time settings */ + tmr_brkdt_struct.brk_enable = FALSE; + tmr_brkdt_struct.auto_output_enable = FALSE; + tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW; + tmr_brkdt_struct.fcsoen_state = FALSE; + tmr_brkdt_struct.fcsodis_state = FALSE; + tmr_brkdt_struct.wp_level = TMR_WP_OFF; + tmr_brkdt_struct.deadtime = 0; + tmr_brkdt_config(TMR8, &tmr_brkdt_struct); + tmr_output_enable(TMR8, TRUE); - tmr_output_enable(TMR8, TRUE); + tmr_counter_enable(TMR8, TRUE); - tmr_counter_enable(TMR8, TRUE); + /* add user code begin tmr8_init 2 */ - /* add user code begin tmr8_init 2 */ - - /* add user code end tmr8_init 2 */ + /* add user code end tmr8_init 2 */ } /** - * @brief init tmr11 function. - * @param none - * @retval none - */ + * @brief init tmr11 function. + * @param none + * @retval none + */ void wk_tmr11_init(void) { - /* add user code begin tmr11_init 0 */ + /* add user code begin tmr11_init 0 */ - /* add user code end tmr11_init 0 */ + /* add user code end tmr11_init 0 */ - gpio_init_type gpio_init_struct; - tmr_output_config_type tmr_output_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_init_type gpio_init_struct; + tmr_output_config_type tmr_output_struct; + gpio_default_para_init(&gpio_init_struct); - /* add user code begin tmr11_init 1 */ + /* add user code begin tmr11_init 1 */ - /* add user code end tmr11_init 1 */ + /* add user code end tmr11_init 1 */ - /* configure the CH1 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_9; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOB, &gpio_init_struct); + /* configure the CH1 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_9; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOB, &gpio_init_struct); - /* configure counter settings */ - tmr_base_init(TMR11, 65535, 0); - tmr_cnt_dir_set(TMR11, TMR_COUNT_UP); - tmr_clock_source_div_set(TMR11, TMR_CLOCK_DIV1); - tmr_period_buffer_enable(TMR11, FALSE); + /* configure counter settings */ + tmr_base_init(TMR11, 65535, 0); + tmr_cnt_dir_set(TMR11, TMR_COUNT_UP); + tmr_clock_source_div_set(TMR11, TMR_CLOCK_DIV1); + tmr_period_buffer_enable(TMR11, FALSE); - /* configure channel 1 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR11, TMR_SELECT_CHANNEL_1, &tmr_output_struct); - tmr_channel_value_set(TMR11, TMR_SELECT_CHANNEL_1, 0); - tmr_output_channel_buffer_enable(TMR11, TMR_SELECT_CHANNEL_1, FALSE); + /* configure channel 1 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR11, TMR_SELECT_CHANNEL_1, &tmr_output_struct); + tmr_channel_value_set(TMR11, TMR_SELECT_CHANNEL_1, 0); + tmr_output_channel_buffer_enable(TMR11, TMR_SELECT_CHANNEL_1, FALSE); - tmr_counter_enable(TMR11, TRUE); + tmr_counter_enable(TMR11, TRUE); - /* add user code begin tmr11_init 2 */ + /* add user code begin tmr11_init 2 */ - /* add user code end tmr11_init 2 */ + /* add user code end tmr11_init 2 */ } /** - * @brief init tmr12 function. - * @param none - * @retval none - */ + * @brief init tmr12 function. + * @param none + * @retval none + */ void wk_tmr12_init(void) { - /* add user code begin tmr12_init 0 */ + /* add user code begin tmr12_init 0 */ - /* add user code end tmr12_init 0 */ + /* add user code end tmr12_init 0 */ - gpio_init_type gpio_init_struct; - tmr_output_config_type tmr_output_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_init_type gpio_init_struct; + tmr_output_config_type tmr_output_struct; + gpio_default_para_init(&gpio_init_struct); - /* add user code begin tmr12_init 1 */ + /* add user code begin tmr12_init 1 */ - /* add user code end tmr12_init 1 */ + /* add user code end tmr12_init 1 */ - /* configure the CH1 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_14; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOB, &gpio_init_struct); + /* configure the CH1 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_14; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOB, &gpio_init_struct); - /* configure the CH2 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_15; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOB, &gpio_init_struct); + /* configure the CH2 pin */ + gpio_init_struct.gpio_pins = GPIO_PINS_15; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init(GPIOB, &gpio_init_struct); - /* configure counter settings */ - tmr_base_init(TMR12, 65535, 0); - tmr_cnt_dir_set(TMR12, TMR_COUNT_UP); - tmr_clock_source_div_set(TMR12, TMR_CLOCK_DIV1); - tmr_period_buffer_enable(TMR12, FALSE); + /* configure counter settings */ + tmr_base_init(TMR12, 65535, 0); + tmr_cnt_dir_set(TMR12, TMR_COUNT_UP); + tmr_clock_source_div_set(TMR12, TMR_CLOCK_DIV1); + tmr_period_buffer_enable(TMR12, FALSE); - /* configure channel 1 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_1, &tmr_output_struct); - tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_1, 0); - tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_1, FALSE); + /* configure channel 1 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_1, &tmr_output_struct); + tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_1, 0); + tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_1, FALSE); - /* configure channel 2 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_2, &tmr_output_struct); - tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_2, 0); - tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_2, FALSE); + /* configure channel 2 output settings */ + tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; + tmr_output_struct.oc_output_state = TRUE; + tmr_output_struct.occ_output_state = FALSE; + tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; + tmr_output_struct.oc_idle_state = FALSE; + tmr_output_struct.occ_idle_state = FALSE; + tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_2, &tmr_output_struct); + tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_2, 0); + tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_2, FALSE); - tmr_counter_enable(TMR12, TRUE); + tmr_counter_enable(TMR12, TRUE); - /* add user code begin tmr12_init 2 */ + /* add user code begin tmr12_init 2 */ - /* add user code end tmr12_init 2 */ + /* add user code end tmr12_init 2 */ } /** - * @brief init can1 function. - * @param none - * @retval none - */ + * @brief init can1 function. + * @param none + * @retval none + */ void wk_can1_init(void) { - /* add user code begin can1_init 0 */ + /* add user code begin can1_init 0 */ - /* add user code end can1_init 0 */ - - gpio_init_type gpio_init_struct; - can_base_type can_base_struct; - can_baudrate_type can_baudrate_struct; - can_filter_init_type can_filter_init_struct; + /* add user code end can1_init 0 */ - /* add user code begin can1_init 1 */ + gpio_init_type gpio_init_struct; + can_base_type can_base_struct; + can_baudrate_type can_baudrate_struct; + can_filter_init_type can_filter_init_struct; - /* add user code end can1_init 1 */ - - /*gpio-----------------------------------------------------------------------------*/ - gpio_default_para_init(&gpio_init_struct); + /* add user code begin can1_init 1 */ - /* configure the CAN1 TX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_pins = GPIO_PINS_12; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /* add user code end can1_init 1 */ - /* configure the CAN1 RX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_11; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); + /*gpio-----------------------------------------------------------------------------*/ + gpio_default_para_init(&gpio_init_struct); - /*can_base_init--------------------------------------------------------------------*/ - can_default_para_init(&can_base_struct); - can_base_struct.mode_selection = CAN_MODE_COMMUNICATE; - can_base_struct.ttc_enable = FALSE; - can_base_struct.aebo_enable = TRUE; - can_base_struct.aed_enable = TRUE; - can_base_struct.prsf_enable = FALSE; - can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED; - can_base_struct.mmssr_selection = CAN_SENDING_BY_ID; + /* configure the CAN1 TX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_12; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); - can_base_init(CAN1, &can_base_struct); + /* configure the CAN1 RX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_11; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); - /*can_baudrate_setting-------------------------------------------------------------*/ - /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ - can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/ - can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/ - can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/ - can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/ - can_baudrate_set(CAN1, &can_baudrate_struct); + /*can_base_init--------------------------------------------------------------------*/ + can_default_para_init(&can_base_struct); + can_base_struct.mode_selection = CAN_MODE_COMMUNICATE; + can_base_struct.ttc_enable = FALSE; + can_base_struct.aebo_enable = TRUE; + can_base_struct.aed_enable = TRUE; + can_base_struct.prsf_enable = FALSE; + can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED; + can_base_struct.mmssr_selection = CAN_SENDING_BY_ID; - /*can_filter_0_config--------------------------------------------------------------*/ - can_filter_init_struct.filter_activate_enable = TRUE; - can_filter_init_struct.filter_number = 0; - can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0; - can_filter_init_struct.filter_bit = CAN_FILTER_16BIT; - can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK; - /*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/ - can_filter_init_struct.filter_id_high = 0x0 << 5; - can_filter_init_struct.filter_id_low = 0x0 << 5; - can_filter_init_struct.filter_mask_high = 0x0 << 5; - can_filter_init_struct.filter_mask_low = 0x0 << 5; + can_base_init(CAN1, &can_base_struct); - can_filter_init(CAN1, &can_filter_init_struct); + /*can_baudrate_setting-------------------------------------------------------------*/ + /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ + can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/ + can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/ + can_baudrate_struct.bts1_size = CAN_BTS1_8TQ; /*value: 1~16*/ + can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/ + can_baudrate_set(CAN1, &can_baudrate_struct); - /* add user code begin can1_init 2 */ + /*can_filter_0_config--------------------------------------------------------------*/ + can_filter_init_struct.filter_activate_enable = TRUE; + can_filter_init_struct.filter_number = 0; + can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0; + can_filter_init_struct.filter_bit = CAN_FILTER_16BIT; + can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK; + /*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/ + can_filter_init_struct.filter_id_high = 0x0 << 5; + can_filter_init_struct.filter_id_low = 0x0 << 5; + can_filter_init_struct.filter_mask_high = 0x0 << 5; + can_filter_init_struct.filter_mask_low = 0x0 << 5; - /* add user code end can1_init 2 */ + can_filter_init(CAN1, &can_filter_init_struct); + + /* add user code begin can1_init 2 */ + + /* add user code end can1_init 2 */ } /** - * @brief init can2 function. - * @param none - * @retval none - */ + * @brief init can2 function. + * @param none + * @retval none + */ void wk_can2_init(void) { - /* add user code begin can2_init 0 */ + /* add user code begin can2_init 0 */ - /* add user code end can2_init 0 */ - - gpio_init_type gpio_init_struct; - can_base_type can_base_struct; - can_baudrate_type can_baudrate_struct; - can_filter_init_type can_filter_init_struct; + /* add user code end can2_init 0 */ - /* add user code begin can2_init 1 */ + gpio_init_type gpio_init_struct; + can_base_type can_base_struct; + can_baudrate_type can_baudrate_struct; + can_filter_init_type can_filter_init_struct; - /* add user code end can2_init 1 */ - - /*gpio-----------------------------------------------------------------------------*/ - gpio_default_para_init(&gpio_init_struct); + /* add user code begin can2_init 1 */ - /* configure the CAN2 TX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_pins = GPIO_PINS_13; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOB, &gpio_init_struct); + /* add user code end can2_init 1 */ - /* configure the CAN2 RX pin */ - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_12; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOB, &gpio_init_struct); + /*gpio-----------------------------------------------------------------------------*/ + gpio_default_para_init(&gpio_init_struct); - /*can_base_init--------------------------------------------------------------------*/ - can_default_para_init(&can_base_struct); - can_base_struct.mode_selection = CAN_MODE_COMMUNICATE; - can_base_struct.ttc_enable = FALSE; - can_base_struct.aebo_enable = TRUE; - can_base_struct.aed_enable = TRUE; - can_base_struct.prsf_enable = FALSE; - can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED; - can_base_struct.mmssr_selection = CAN_SENDING_BY_ID; + /* configure the CAN2 TX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_13; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOB, &gpio_init_struct); - can_base_init(CAN2, &can_base_struct); + /* configure the CAN2 RX pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_12; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOB, &gpio_init_struct); - /*can_baudrate_setting-------------------------------------------------------------*/ - /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ - can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/ - can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/ - can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/ - can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/ - can_baudrate_set(CAN2, &can_baudrate_struct); + /*can_base_init--------------------------------------------------------------------*/ + can_default_para_init(&can_base_struct); + can_base_struct.mode_selection = CAN_MODE_COMMUNICATE; + can_base_struct.ttc_enable = FALSE; + can_base_struct.aebo_enable = TRUE; + can_base_struct.aed_enable = TRUE; + can_base_struct.prsf_enable = FALSE; + can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED; + can_base_struct.mmssr_selection = CAN_SENDING_BY_ID; - /*can_filter_0_config--------------------------------------------------------------*/ - can_filter_init_struct.filter_activate_enable = TRUE; - can_filter_init_struct.filter_number = 0; - can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0; - can_filter_init_struct.filter_bit = CAN_FILTER_16BIT; - can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK; - /*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/ - can_filter_init_struct.filter_id_high = 0x0 << 5; - can_filter_init_struct.filter_id_low = 0x0 << 5; - can_filter_init_struct.filter_mask_high = 0x0 << 5; - can_filter_init_struct.filter_mask_low = 0x0 << 5; + can_base_init(CAN2, &can_base_struct); - can_filter_init(CAN2, &can_filter_init_struct); + /*can_baudrate_setting-------------------------------------------------------------*/ + /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ + can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/ + can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/ + can_baudrate_struct.bts1_size = CAN_BTS1_8TQ; /*value: 1~16*/ + can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/ + can_baudrate_set(CAN2, &can_baudrate_struct); - /* add user code begin can2_init 2 */ + /*can_filter_0_config--------------------------------------------------------------*/ + can_filter_init_struct.filter_activate_enable = TRUE; + can_filter_init_struct.filter_number = 0; + can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0; + can_filter_init_struct.filter_bit = CAN_FILTER_16BIT; + can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK; + /*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/ + can_filter_init_struct.filter_id_high = 0x0 << 5; + can_filter_init_struct.filter_id_low = 0x0 << 5; + can_filter_init_struct.filter_mask_high = 0x0 << 5; + can_filter_init_struct.filter_mask_low = 0x0 << 5; - /* add user code end can2_init 2 */ + can_filter_init(CAN2, &can_filter_init_struct); + + /* add user code begin can2_init 2 */ + + /* add user code end can2_init 2 */ } /** - * @brief init adc1 function. - * @param none - * @retval none - */ + * @brief init adc1 function. + * @param none + * @retval none + */ void wk_adc1_init(void) { - /* add user code begin adc1_init 0 */ + /* add user code begin adc1_init 0 */ - /* add user code end adc1_init 0 */ + /* add user code end adc1_init 0 */ - gpio_init_type gpio_init_struct; - adc_base_config_type adc_base_struct; + gpio_init_type gpio_init_struct; + adc_base_config_type adc_base_struct; - gpio_default_para_init(&gpio_init_struct); + gpio_default_para_init(&gpio_init_struct); - /* add user code begin adc1_init 1 */ + /* add user code begin adc1_init 1 */ - /* add user code end adc1_init 1 */ + /* add user code end adc1_init 1 */ - /*gpio--------------------------------------------------------------------*/ - /* configure the IN0 pin */ - gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG; - gpio_init_struct.gpio_pins = GPIO_PINS_0; - gpio_init(GPIOA, &gpio_init_struct); + /*gpio--------------------------------------------------------------------*/ + /* configure the IN0 pin */ + gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG; + gpio_init_struct.gpio_pins = GPIO_PINS_0; + gpio_init(GPIOA, &gpio_init_struct); - crm_adc_clock_div_set(CRM_ADC_DIV_6); + crm_adc_clock_div_set(CRM_ADC_DIV_6); - /*adc_common_settings-------------------------------------------------------------*/ - adc_combine_mode_select(ADC_INDEPENDENT_MODE); + /*adc_common_settings-------------------------------------------------------------*/ + adc_combine_mode_select(ADC_INDEPENDENT_MODE); - /*adc_settings--------------------------------------------------------------------*/ - adc_base_default_para_init(&adc_base_struct); - adc_base_struct.sequence_mode = FALSE; - adc_base_struct.repeat_mode = FALSE; - adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; - adc_base_struct.ordinary_channel_length = 1; - adc_base_config(ADC1, &adc_base_struct); + /*adc_settings--------------------------------------------------------------------*/ + adc_base_default_para_init(&adc_base_struct); + adc_base_struct.sequence_mode = FALSE; + adc_base_struct.repeat_mode = FALSE; + adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; + adc_base_struct.ordinary_channel_length = 1; + adc_base_config(ADC1, &adc_base_struct); - /* adc_ordinary_conversionmode-------------------------------------------- */ - adc_ordinary_channel_set(ADC1, ADC_CHANNEL_0, 1, ADC_SAMPLETIME_1_5); + /* adc_ordinary_conversionmode-------------------------------------------- */ + adc_ordinary_channel_set(ADC1, ADC_CHANNEL_0, 1, ADC_SAMPLETIME_1_5); - adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE); + adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE); - adc_ordinary_part_mode_enable(ADC1, FALSE); + adc_ordinary_part_mode_enable(ADC1, FALSE); - adc_enable(ADC1, TRUE); - - /* adc calibration-------------------------------------------------------- */ - adc_calibration_init(ADC1); - while(adc_calibration_init_status_get(ADC1)); - adc_calibration_start(ADC1); - while(adc_calibration_status_get(ADC1)); + adc_enable(ADC1, TRUE); - /* add user code begin adc1_init 2 */ + /* adc calibration-------------------------------------------------------- */ + adc_calibration_init(ADC1); + while (adc_calibration_init_status_get(ADC1)) + ; + adc_calibration_start(ADC1); + while (adc_calibration_status_get(ADC1)) + ; - /* add user code end adc1_init 2 */ + /* add user code begin adc1_init 2 */ + + /* add user code end adc1_init 2 */ } /* add user code begin 1 */ diff --git a/project/src/main.c b/project/src/main.c index a290040..26975d4 100644 --- a/project/src/main.c +++ b/project/src/main.c @@ -26,6 +26,7 @@ /* Includes ------------------------------------------------------------------*/ #include "at32f403a_407_wk_config.h" + /* private includes ----------------------------------------------------------*/ /* add user code begin private includes */ #include "dwt_delay.h" @@ -71,7 +72,7 @@ int main(void) { /* add user code begin 1 */ - + by_debug_init(); /* add user code end 1 */ /* system clock config. */ @@ -83,9 +84,6 @@ int main(void) /* init debug function. */ wk_debug_config(); - /* init pwc function. */ - wk_pwc_init(); - /* nvic config. */ wk_nvic_config(); @@ -107,6 +105,9 @@ int main(void) /* init adc1 function. */ wk_adc1_init(); + /* init tmr6 function. */ + wk_tmr6_init(); + /* init tmr8 function. */ wk_tmr8_init(); @@ -127,9 +128,9 @@ int main(void) /* add user code begin 2 */ DWT_Init(); - by_debug_init(); - /* add user code end 2 */ + lwprintf("init done!\r\n"); + /* add user code end 2 */ while (1) { /* add user code begin 3 */