btl143/BC1C-firmware
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feat: 移植到 BC2C 新板

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bmy
2024-06-05 01:05:23 +08:00
parent 92395b9bb7
commit fc62db026b
13 changed files with 172 additions and 652 deletions
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4
project/inc/at32f403a_407_conf.h
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@@ -39,7 +39,7 @@ extern "C" {
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
#define HEXT_VALUE ((uint32_t)16000000) /*!< value of the high speed exernal crystal in hz */
#endif
/**
@@ -64,7 +64,7 @@ extern "C" {
/*#define EXINT_MODULE_ENABLED--------------------*/
#define FLASH_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
/*#define I2C_MODULE_ENABLED----------------------*/
#define MISC_MODULE_ENABLED
#define PWC_MODULE_ENABLED
/*#define RTC_MODULE_ENABLED----------------------*/

71
project/inc/at32f403a_407_wk_config.h
View File

@@ -55,65 +55,6 @@ extern "C" {
/* add user code end exported macro */
/* add user code begin dma define */
/* user can only modify the dma define value */
//#define DMA1_CHANNEL1_BUFFER_SIZE 0
//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL2_BUFFER_SIZE 0
//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL3_BUFFER_SIZE 0
//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL4_BUFFER_SIZE 0
//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL5_BUFFER_SIZE 0
//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL6_BUFFER_SIZE 0
//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL7_BUFFER_SIZE 0
//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL1_BUFFER_SIZE 0
//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL2_BUFFER_SIZE 0
//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL3_BUFFER_SIZE 0
//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL4_BUFFER_SIZE 0
//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL5_BUFFER_SIZE 0
//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL6_BUFFER_SIZE 0
//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL7_BUFFER_SIZE 0
//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR 0
/* add user code end dma define */
/* exported functions ------------------------------------------------------- */
/* system clock config. */
void wk_system_clock_config(void);
@@ -130,12 +71,6 @@ extern "C" {
/* init gpio function. */
void wk_gpio_config(void);
/* init i2c1 function. */
void wk_i2c1_init(void);
/* init i2c2 function. */
void wk_i2c2_init(void);
/* init can1 function. */
void wk_can1_init(void);
@@ -157,12 +92,6 @@ extern "C" {
/* init tmr8 function. */
void wk_tmr8_init(void);
/* init tmr11 function. */
void wk_tmr11_init(void);
/* init tmr12 function. */
void wk_tmr12_init(void);
/* init crc function. */
void wk_crc_init(void);