704 lines
22 KiB
C
704 lines
22 KiB
C
/* add user code begin Header */
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/**
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**************************************************************************
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* @file at32f403a_407_wk_config.c
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* @brief work bench config program
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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/* add user code end Header */
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#include "at32f403a_407_wk_config.h"
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/* private includes ----------------------------------------------------------*/
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/* add user code begin private includes */
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/* add user code end private includes */
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/* private typedef -----------------------------------------------------------*/
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/* add user code begin private typedef */
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/* add user code end private typedef */
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/* private define ------------------------------------------------------------*/
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/* add user code begin private define */
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/* add user code end private define */
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/* private macro -------------------------------------------------------------*/
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/* add user code begin private macro */
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/* add user code end private macro */
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/* private variables ---------------------------------------------------------*/
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/* add user code begin private variables */
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/* add user code end private variables */
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/* private function prototypes --------------------------------------------*/
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/* add user code begin function prototypes */
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/* add user code end function prototypes */
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/* private user code ---------------------------------------------------------*/
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/* add user code begin 0 */
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/* add user code end 0 */
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/**
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* @brief system clock config program
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* @note the system clock is configured as follow:
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* system clock (sclk) = hext / 2 * pll_mult
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* system clock source = HEXT_VALUE
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* - hext = HEXT_VALUE
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* - sclk = 240000000
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* - ahbdiv = 1
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* - ahbclk = 240000000
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* - apb1div = 2
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* - apb1clk = 120000000
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* - apb2div = 2
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* - apb2clk = 120000000
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* - pll_mult = 30
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* - pll_range = GT72MHZ (greater than 72 mhz)
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* @param none
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* @retval none
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*/
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void wk_system_clock_config(void)
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{
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/* reset crm */
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crm_reset();
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/* enable lick */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
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/* wait till lick is ready */
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while(crm_flag_get(CRM_LICK_STABLE_FLAG) != SET)
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{
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}
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/* enable hext */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
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/* wait till hext is ready */
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while(crm_hext_stable_wait() == ERROR)
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{
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}
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/* enable hick */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
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/* wait till hick is ready */
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while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
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{
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}
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/* config pll clock resource */
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crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_30, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
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/* config hext division */
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crm_hext_clock_div_set(CRM_HEXT_DIV_2);
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/* enable pll */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
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/* wait till pll is ready */
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while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
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{
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}
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/* config ahbclk */
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crm_ahb_div_set(CRM_AHB_DIV_1);
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/* config apb2clk, the maximum frequency of APB2 clock is 120 MHz */
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crm_apb2_div_set(CRM_APB2_DIV_2);
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/* config apb1clk, the maximum frequency of APB1 clock is 120 MHz */
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crm_apb1_div_set(CRM_APB1_DIV_2);
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/* enable auto step mode */
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crm_auto_step_mode_enable(TRUE);
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/* select pll as system clock source */
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crm_sysclk_switch(CRM_SCLK_PLL);
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/* wait till pll is used as system clock source */
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while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
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{
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}
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/* disable auto step mode */
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crm_auto_step_mode_enable(FALSE);
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/* update system_core_clock global variable */
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system_core_clock_update();
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}
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/**
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* @brief config periph clock
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* @param none
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* @retval none
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*/
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void wk_periph_clock_config(void)
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{
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/* enable crc periph clock */
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crm_periph_clock_enable(CRM_CRC_PERIPH_CLOCK, TRUE);
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/* enable iomux periph clock */
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crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
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/* enable gpioa periph clock */
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crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
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/* enable gpiob periph clock */
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crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
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/* enable gpiod periph clock */
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crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
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/* enable tmr8 periph clock */
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crm_periph_clock_enable(CRM_TMR8_PERIPH_CLOCK, TRUE);
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/* enable usart1 periph clock */
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crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
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/* enable tmr6 periph clock */
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crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
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/* enable usart2 periph clock */
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crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
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/* enable usart3 periph clock */
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crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
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/* enable can1 periph clock */
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crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
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/* enable can2 periph clock */
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crm_periph_clock_enable(CRM_CAN2_PERIPH_CLOCK, TRUE);
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}
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/**
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* @brief init debug function.
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* @param none
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* @retval none
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*/
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void wk_debug_config(void)
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{
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/* jtag-dp disabled and sw-dp enabled */
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gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
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}
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/**
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* @brief nvic config
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* @param none
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* @retval none
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*/
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void wk_nvic_config(void)
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{
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nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
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nvic_irq_enable(USBFS_L_CAN1_RX0_IRQn, 0, 0);
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nvic_irq_enable(USART1_IRQn, 1, 0);
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nvic_irq_enable(USART2_IRQn, 1, 0);
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nvic_irq_enable(USART3_IRQn, 1, 0);
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nvic_irq_enable(TMR6_GLOBAL_IRQn, 0, 0);
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nvic_irq_enable(CAN2_RX0_IRQn, 0, 0);
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}
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/**
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* @brief init gpio_input/gpio_output/gpio_analog/eventout function.
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* @param none
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* @retval none
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*/
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void wk_gpio_config(void)
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{
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/* add user code begin gpio_config 0 */
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/* add user code end gpio_config 0 */
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gpio_init_type gpio_init_struct;
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gpio_default_para_init(&gpio_init_struct);
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/* add user code begin gpio_config 1 */
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/* add user code end gpio_config 1 */
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/* gpio output config */
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gpio_bits_reset(GPIOB, GPIO_PINS_6 | GPIO_PINS_7);
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOB, &gpio_init_struct);
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/* add user code begin gpio_config 2 */
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/* add user code end gpio_config 2 */
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}
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/**
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* @brief init usart1 function
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* @param none
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* @retval none
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*/
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void wk_usart1_init(void)
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{
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/* add user code begin usart1_init 0 */
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/* add user code end usart1_init 0 */
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gpio_init_type gpio_init_struct;
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gpio_default_para_init(&gpio_init_struct);
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/* add user code begin usart1_init 1 */
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/* add user code end usart1_init 1 */
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/* configure the TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_9;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_10;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure param */
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usart_init(USART1, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_transmitter_enable(USART1, TRUE);
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usart_receiver_enable(USART1, TRUE);
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usart_parity_selection_config(USART1, USART_PARITY_NONE);
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usart_hardware_flow_control_set(USART1, USART_HARDWARE_FLOW_NONE);
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/**
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* Users need to configure USART1 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding USART1 interrupt.
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* --usart_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file.
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* --void USART1_IRQHandler(void)
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*/
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usart_enable(USART1, TRUE);
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/* add user code begin usart1_init 2 */
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usart_interrupt_enable(USART1, USART_RDBF_INT, TRUE);
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/* add user code end usart1_init 2 */
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}
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/**
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* @brief init usart2 function
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* @param none
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* @retval none
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*/
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void wk_usart2_init(void)
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{
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/* add user code begin usart2_init 0 */
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/* add user code end usart2_init 0 */
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gpio_init_type gpio_init_struct;
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gpio_default_para_init(&gpio_init_struct);
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/* add user code begin usart2_init 1 */
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/* add user code end usart2_init 1 */
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/* configure the TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_2;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_3;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure param */
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usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_transmitter_enable(USART2, TRUE);
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usart_receiver_enable(USART2, TRUE);
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usart_parity_selection_config(USART2, USART_PARITY_NONE);
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usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_NONE);
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/**
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* Users need to configure USART2 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding USART2 interrupt.
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* --usart_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file.
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* --void USART2_IRQHandler(void)
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*/
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usart_enable(USART2, TRUE);
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/* add user code begin usart2_init 2 */
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usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
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/* add user code end usart2_init 2 */
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}
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/**
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* @brief init usart3 function
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* @param none
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* @retval none
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*/
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void wk_usart3_init(void)
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{
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/* add user code begin usart3_init 0 */
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/* add user code end usart3_init 0 */
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gpio_init_type gpio_init_struct;
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gpio_default_para_init(&gpio_init_struct);
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/* add user code begin usart3_init 1 */
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/* add user code end usart3_init 1 */
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/* configure the TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_10;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOB, &gpio_init_struct);
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/* configure the RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_11;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOB, &gpio_init_struct);
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/* configure param */
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usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_transmitter_enable(USART3, TRUE);
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usart_receiver_enable(USART3, TRUE);
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usart_parity_selection_config(USART3, USART_PARITY_NONE);
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usart_hardware_flow_control_set(USART3, USART_HARDWARE_FLOW_NONE);
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/**
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* Users need to configure USART3 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding USART3 interrupt.
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* --usart_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file.
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* --void USART3_IRQHandler(void)
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*/
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usart_enable(USART3, TRUE);
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/* add user code begin usart3_init 2 */
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usart_interrupt_enable(USART3, USART_RDBF_INT, TRUE);
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/* add user code end usart3_init 2 */
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}
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/**
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* @brief init tmr6 function.
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* @param none
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* @retval none
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*/
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void wk_tmr6_init(void)
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{
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/* add user code begin tmr6_init 0 */
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/* add user code end tmr6_init 0 */
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/* add user code begin tmr6_init 1 */
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/* add user code end tmr6_init 1 */
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/* configure counter settings */
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tmr_base_init(TMR6, 2399, 499);
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tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
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tmr_period_buffer_enable(TMR6, FALSE);
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/* configure primary mode settings */
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tmr_primary_mode_select(TMR6, TMR_PRIMARY_SEL_RESET);
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tmr_counter_enable(TMR6, TRUE);
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/**
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* Users need to configure TMR6 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding TMR6 interrupt.
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* --tmr_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file.
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* --void TMR6_GLOBAL_IRQHandler(void)
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*/
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/* add user code begin tmr6_init 2 */
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tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
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/* add user code end tmr6_init 2 */
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}
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/**
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* @brief init tmr8 function.
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* @param none
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* @retval none
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*/
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void wk_tmr8_init(void)
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{
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/* add user code begin tmr8_init 0 */
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/* add user code end tmr8_init 0 */
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/* add user code begin tmr8_init 1 */
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/* add user code end tmr8_init 1 */
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/* configure counter settings */
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tmr_base_init(TMR8, 2399, 1999);
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tmr_cnt_dir_set(TMR8, TMR_COUNT_UP);
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tmr_clock_source_div_set(TMR8, TMR_CLOCK_DIV1);
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tmr_repetition_counter_set(TMR8, 0);
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tmr_period_buffer_enable(TMR8, FALSE);
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/* configure primary mode settings */
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tmr_sub_sync_mode_set(TMR8, FALSE);
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tmr_primary_mode_select(TMR8, TMR_PRIMARY_SEL_RESET);
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tmr_counter_enable(TMR8, TRUE);
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/* add user code begin tmr8_init 2 */
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/* add user code end tmr8_init 2 */
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}
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/**
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* @brief init can1 function.
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* @param none
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* @retval none
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*/
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void wk_can1_init(void)
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{
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/* add user code begin can1_init 0 */
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/* add user code end can1_init 0 */
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gpio_init_type gpio_init_struct;
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can_base_type can_base_struct;
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can_baudrate_type can_baudrate_struct;
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can_filter_init_type can_filter_init_struct;
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/* add user code begin can1_init 1 */
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/* add user code end can1_init 1 */
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/*gpio-----------------------------------------------------------------------------*/
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gpio_default_para_init(&gpio_init_struct);
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/* configure the CAN1 TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_12;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the CAN1 RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_11;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/*can_base_init--------------------------------------------------------------------*/
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can_default_para_init(&can_base_struct);
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can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
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can_base_struct.ttc_enable = FALSE;
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can_base_struct.aebo_enable = TRUE;
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can_base_struct.aed_enable = TRUE;
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can_base_struct.prsf_enable = FALSE;
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can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
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can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
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can_base_init(CAN1, &can_base_struct);
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/*can_baudrate_setting-------------------------------------------------------------*/
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/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
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can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/
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can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
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can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
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can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
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can_baudrate_set(CAN1, &can_baudrate_struct);
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/*can_filter_0_config--------------------------------------------------------------*/
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can_filter_init_struct.filter_activate_enable = TRUE;
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can_filter_init_struct.filter_number = 0;
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can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
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can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
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can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
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/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
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can_filter_init_struct.filter_id_high = 0x0 << 5;
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can_filter_init_struct.filter_id_low = 0x0 << 5;
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can_filter_init_struct.filter_mask_high = 0x0 << 5;
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can_filter_init_struct.filter_mask_low = 0x0 << 5;
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can_filter_init(CAN1, &can_filter_init_struct);
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/**
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* Users need to configure CAN1 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding CAN1 interrupt.
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* --can_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file.
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* --void USBFS_L_CAN1_RX0_IRQHandler(void)
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*/
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/*can1 rx0 interrupt config--------------------------------------------------------*/
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//can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
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/* add user code begin can1_init 2 */
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can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
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/* add user code end can1_init 2 */
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}
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/**
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* @brief init can2 function.
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* @param none
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* @retval none
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*/
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void wk_can2_init(void)
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{
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/* add user code begin can2_init 0 */
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/* add user code end can2_init 0 */
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gpio_init_type gpio_init_struct;
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can_base_type can_base_struct;
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can_baudrate_type can_baudrate_struct;
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can_filter_init_type can_filter_init_struct;
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/* add user code begin can2_init 1 */
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/* add user code end can2_init 1 */
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/*gpio-----------------------------------------------------------------------------*/
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gpio_default_para_init(&gpio_init_struct);
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/* configure the CAN2 TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_13;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOB, &gpio_init_struct);
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/* configure the CAN2 RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_12;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOB, &gpio_init_struct);
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/*can_base_init--------------------------------------------------------------------*/
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can_default_para_init(&can_base_struct);
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can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
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can_base_struct.ttc_enable = FALSE;
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can_base_struct.aebo_enable = TRUE;
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can_base_struct.aed_enable = TRUE;
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can_base_struct.prsf_enable = FALSE;
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can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
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can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
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can_base_init(CAN2, &can_base_struct);
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/*can_baudrate_setting-------------------------------------------------------------*/
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/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
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can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/
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can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
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can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
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can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
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can_baudrate_set(CAN2, &can_baudrate_struct);
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/*can_filter_0_config--------------------------------------------------------------*/
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can_filter_init_struct.filter_activate_enable = TRUE;
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can_filter_init_struct.filter_number = 0;
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can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
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can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
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can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
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/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
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can_filter_init_struct.filter_id_high = 0x0 << 5;
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can_filter_init_struct.filter_id_low = 0x0 << 5;
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can_filter_init_struct.filter_mask_high = 0x0 << 5;
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can_filter_init_struct.filter_mask_low = 0x0 << 5;
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can_filter_init(CAN2, &can_filter_init_struct);
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/**
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* Users need to configure CAN2 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding CAN2 interrupt.
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* --can_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f403a_407_int.c file.
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* --void CAN2_RX0_IRQHandler(void)
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*/
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/*can2 rx0 interrupt config--------------------------------------------------------*/
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//can_interrupt_enable(CAN2, CAN_RF0MIEN_INT, TRUE);
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/* add user code begin can2_init 2 */
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can_interrupt_enable(CAN2, CAN_RF0MIEN_INT, TRUE);
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/* add user code end can2_init 2 */
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}
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/**
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* @brief init crc function.
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* @param none
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* @retval none
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*/
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void wk_crc_init(void)
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{
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/* add user code begin crc_init 0 */
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/* add user code end crc_init 0 */
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crc_init_data_set(0xFFFFFFFF);
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crc_poly_size_set(CRC_POLY_SIZE_16B);
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crc_poly_value_set(0x8005);
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crc_reverse_input_data_set(CRC_REVERSE_INPUT_BY_BYTE);
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crc_reverse_output_data_set(CRC_REVERSE_OUTPUT_DATA);
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crc_data_reset();
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/* add user code begin crc_init 1 */
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/* add user code end crc_init 1 */
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}
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/* add user code begin 1 */
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/* add user code end 1 */
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