initial commit
This commit is contained in:
@@ -0,0 +1,168 @@
|
||||
/*
|
||||
*****************************************************************************
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||||
**
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||||
** File : AT32F413x8_FLASH.ld
|
||||
**
|
||||
** Abstract : Linker script for AT32F413x8 Device with
|
||||
** 64KByte FLASH, 32KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : Artery Tek AT32
|
||||
**
|
||||
** Environment : Arm gcc toolchain
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||||
**
|
||||
*****************************************************************************
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||||
*/
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||||
|
||||
/* Entry Point */
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||||
ENTRY(Reset_Handler)
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||||
|
||||
/* Highest address of the user mode stack */
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||||
_estack = 0x20008000; /* end of RAM */
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||||
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||||
/* Generate a link error if heap and stack don't fit into RAM */
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||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
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||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
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||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
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||||
SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
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||||
}
|
||||
|
||||
/* Define output sections */
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||||
SECTIONS
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||||
{
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||||
/* The startup code goes first into FLASH */
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||||
.isr_vector :
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||||
{
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||||
. = ALIGN(4);
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||||
KEEP(*(.isr_vector)) /* Startup code */
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||||
. = ALIGN(4);
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||||
} >FLASH
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||||
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||||
/* The program code and other data goes into FLASH */
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||||
.text :
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||||
{
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||||
. = ALIGN(4);
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||||
*(.text) /* .text sections (code) */
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||||
*(.text*) /* .text* sections (code) */
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||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
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||||
*(.eh_frame)
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||||
|
||||
KEEP (*(.init))
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||||
KEEP (*(.fini))
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||||
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||||
. = ALIGN(4);
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||||
_etext = .; /* define a global symbols at end of code */
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||||
} >FLASH
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||||
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||||
/* Constant data goes into FLASH */
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||||
.rodata :
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||||
{
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||||
. = ALIGN(4);
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||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
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||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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||||
. = ALIGN(4);
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} >FLASH
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||||
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||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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||||
.ARM : {
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||||
__exidx_start = .;
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||||
*(.ARM.exidx*)
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||||
__exidx_end = .;
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||||
} >FLASH
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||||
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||||
.preinit_array :
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||||
{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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||||
KEEP (*(.preinit_array*))
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||||
PROVIDE_HIDDEN (__preinit_array_end = .);
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||||
} >FLASH
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||||
.init_array :
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||||
{
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||||
PROVIDE_HIDDEN (__init_array_start = .);
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||||
KEEP (*(SORT(.init_array.*)))
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||||
KEEP (*(.init_array*))
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||||
PROVIDE_HIDDEN (__init_array_end = .);
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||||
} >FLASH
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||||
.fini_array :
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||||
{
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||||
PROVIDE_HIDDEN (__fini_array_start = .);
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||||
KEEP (*(SORT(.fini_array.*)))
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||||
KEEP (*(.fini_array*))
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||||
PROVIDE_HIDDEN (__fini_array_end = .);
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||||
} >FLASH
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||||
|
||||
/* used by the startup to initialize data */
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||||
_sidata = LOADADDR(.data);
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||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
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||||
.data :
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||||
{
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||||
. = ALIGN(4);
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||||
_sdata = .; /* create a global symbol at data start */
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||||
*(.data) /* .data sections */
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||||
*(.data*) /* .data* sections */
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||||
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. = ALIGN(4);
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||||
_edata = .; /* define a global symbol at data end */
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||||
} >RAM AT> FLASH
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||||
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||||
_spim_init_base = LOADADDR(.spim);
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||||
_spim_init_length = SIZEOF(.spim);
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||||
|
||||
.spim :
|
||||
{
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||||
. = ALIGN(4);
|
||||
_spim_start = .; /* create a global symbol at spim start */
|
||||
*(.spim) /* .spim sections */
|
||||
*(.spim*) /* .spim* sections */
|
||||
. = ALIGN(4);
|
||||
_spim_end = .; /* define a global symbols at end of spim */
|
||||
} >SPIM
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||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
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||||
*(.bss)
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||||
*(.bss*)
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||||
*(COMMON)
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||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
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||||
__bss_end__ = _ebss;
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||||
} >RAM
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||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
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||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
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||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@@ -0,0 +1,168 @@
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||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : AT32F413xB_FLASH.ld
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||||
**
|
||||
** Abstract : Linker script for AT32F413xB Device with
|
||||
** 128KByte FLASH, 32KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : Artery Tek AT32
|
||||
**
|
||||
** Environment : Arm gcc toolchain
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20008000; /* end of RAM */
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
|
||||
SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
_spim_init_base = LOADADDR(.spim);
|
||||
_spim_init_length = SIZEOF(.spim);
|
||||
|
||||
.spim :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_spim_start = .; /* create a global symbol at spim start */
|
||||
*(.spim) /* .spim sections */
|
||||
*(.spim*) /* .spim* sections */
|
||||
. = ALIGN(4);
|
||||
_spim_end = .; /* define a global symbols at end of spim */
|
||||
} >SPIM
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@@ -0,0 +1,168 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : AT32F413xC_FLASH.ld
|
||||
**
|
||||
** Abstract : Linker script for AT32F413xC Device with
|
||||
** 256KByte FLASH, 32KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : Artery Tek AT32
|
||||
**
|
||||
** Environment : Arm gcc toolchain
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20008000; /* end of RAM */
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
|
||||
SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
_spim_init_base = LOADADDR(.spim);
|
||||
_spim_init_length = SIZEOF(.spim);
|
||||
|
||||
.spim :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_spim_start = .; /* create a global symbol at spim start */
|
||||
*(.spim) /* .spim sections */
|
||||
*(.spim*) /* .spim* sections */
|
||||
. = ALIGN(4);
|
||||
_spim_end = .; /* define a global symbols at end of spim */
|
||||
} >SPIM
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@@ -0,0 +1,431 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_at32f413.s
|
||||
* @brief at32f413xx devices vector table for gcc toolchain.
|
||||
* this module performs:
|
||||
* - set the initial sp
|
||||
* - set the initial pc == reset_handler,
|
||||
* - set the vector table entries with the exceptions isr address
|
||||
* - configure the clock system and the external sram to
|
||||
* be used as data memory (optional, to be enabled by user)
|
||||
* - branches to main in the c library (which eventually
|
||||
* calls main()).
|
||||
* after reset the cortex-m4 processor is in thread mode,
|
||||
* priority is privileged, and the stack is set to main.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDT_IRQHandler /* Window Watchdog Timer */
|
||||
.word PVM_IRQHandler /* PVM through EXINT Line detect */
|
||||
.word TAMPER_IRQHandler /* Tamper */
|
||||
.word RTC_IRQHandler /* RTC */
|
||||
.word FLASH_IRQHandler /* Flash */
|
||||
.word CRM_IRQHandler /* CRM */
|
||||
.word EXINT0_IRQHandler /* EXINT Line 0 */
|
||||
.word EXINT1_IRQHandler /* EXINT Line 1 */
|
||||
.word EXINT2_IRQHandler /* EXINT Line 2 */
|
||||
.word EXINT3_IRQHandler /* EXINT Line 3 */
|
||||
.word EXINT4_IRQHandler /* EXINT Line 4 */
|
||||
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
||||
.word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
|
||||
.word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
|
||||
.word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
|
||||
.word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
|
||||
.word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
|
||||
.word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
|
||||
.word ADC1_2_IRQHandler /* ADC1 & ADC2 */
|
||||
.word USBFS_H_CAN1_TX_IRQHandler /* USB High Priority or CAN1 TX */
|
||||
.word USBFS_L_CAN1_RX0_IRQHandler /* USB Low Priority or CAN1 RX0 */
|
||||
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
|
||||
.word CAN1_SE_IRQHandler /* CAN1 SE */
|
||||
.word EXINT9_5_IRQHandler /* EXINT Line [9:5] */
|
||||
.word TMR1_BRK_TMR9_IRQHandler /* TMR1 Brake and TMR9 */
|
||||
.word TMR1_OVF_TMR10_IRQHandler /* TMR1 Overflow and TMR10 */
|
||||
.word TMR1_TRG_HALL_TMR11_IRQHandler /* TMR1 Trigger and hall and TMR11 */
|
||||
.word TMR1_CH_IRQHandler /* TMR1 Channel */
|
||||
.word TMR2_GLOBAL_IRQHandler /* TMR2 */
|
||||
.word TMR3_GLOBAL_IRQHandler /* TMR3 */
|
||||
.word TMR4_GLOBAL_IRQHandler /* TMR4 */
|
||||
.word I2C1_EVT_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ERR_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EVT_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ERR_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* Reserved */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXINT15_10_IRQHandler /* EXINT Line [15:10] */
|
||||
.word RTCAlarm_IRQHandler /* RTC Alarm through EXINT Line */
|
||||
.word USBFSWakeUp_IRQHandler /* USB Wakeup from suspend */
|
||||
.word TMR8_BRK_IRQHandler /* TMR8 Brake */
|
||||
.word TMR8_OVF_IRQHandler /* TMR8 Overflow */
|
||||
.word TMR8_TRG_HALL_IRQHandler /* TMR8 Trigger and hall */
|
||||
.word TMR8_CH_IRQHandler /* TMR8 Channel */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word SDIO1_IRQHandler /* SDIO1 */
|
||||
.word TMR5_GLOBAL_IRQHandler /* TMR5 */
|
||||
.word 0 /* Reserved */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word DMA2_Channel1_IRQHandler /* DMA2 Channel1 */
|
||||
.word DMA2_Channel2_IRQHandler /* DMA2 Channel2 */
|
||||
.word DMA2_Channel3_IRQHandler /* DMA2 Channel3 */
|
||||
.word DMA2_Channel4_5_IRQHandler /* DMA2 Channel4 & Channel5 */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word CAN2_TX_IRQHandler /* CAN2 TX */
|
||||
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
|
||||
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
|
||||
.word CAN2_SE_IRQHandler /* CAN2 SE */
|
||||
.word ACC_IRQHandler /* ACC */
|
||||
.word USBFS_MAPH_IRQHandler /* USB Map HP */
|
||||
.word USBFS_MAPL_IRQHandler /* USB Map LP */
|
||||
.word DMA2_Channel6_7_IRQHandler /* DMA2 Channel6 & Channel7 */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDT_IRQHandler
|
||||
.thumb_set WWDT_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVM_IRQHandler
|
||||
.thumb_set PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_IRQHandler
|
||||
.thumb_set TAMPER_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRM_IRQHandler
|
||||
.thumb_set CRM_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT0_IRQHandler
|
||||
.thumb_set EXINT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT1_IRQHandler
|
||||
.thumb_set EXINT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT2_IRQHandler
|
||||
.thumb_set EXINT2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT3_IRQHandler
|
||||
.thumb_set EXINT3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT4_IRQHandler
|
||||
.thumb_set EXINT4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBFS_H_CAN1_TX_IRQHandler
|
||||
.thumb_set USBFS_H_CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBFS_L_CAN1_RX0_IRQHandler
|
||||
.thumb_set USBFS_L_CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SE_IRQHandler
|
||||
.thumb_set CAN1_SE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT9_5_IRQHandler
|
||||
.thumb_set EXINT9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR1_BRK_TMR9_IRQHandler
|
||||
.thumb_set TMR1_BRK_TMR9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR1_OVF_TMR10_IRQHandler
|
||||
.thumb_set TMR1_OVF_TMR10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR1_TRG_HALL_TMR11_IRQHandler
|
||||
.thumb_set TMR1_TRG_HALL_TMR11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR1_CH_IRQHandler
|
||||
.thumb_set TMR1_CH_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR2_GLOBAL_IRQHandler
|
||||
.thumb_set TMR2_GLOBAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR3_GLOBAL_IRQHandler
|
||||
.thumb_set TMR3_GLOBAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR4_GLOBAL_IRQHandler
|
||||
.thumb_set TMR4_GLOBAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EVT_IRQHandler
|
||||
.thumb_set I2C1_EVT_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ERR_IRQHandler
|
||||
.thumb_set I2C1_ERR_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EVT_IRQHandler
|
||||
.thumb_set I2C2_EVT_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ERR_IRQHandler
|
||||
.thumb_set I2C2_ERR_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXINT15_10_IRQHandler
|
||||
.thumb_set EXINT15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTCAlarm_IRQHandler
|
||||
.thumb_set RTCAlarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBFSWakeUp_IRQHandler
|
||||
.thumb_set USBFSWakeUp_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR8_BRK_IRQHandler
|
||||
.thumb_set TMR8_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR8_OVF_IRQHandler
|
||||
.thumb_set TMR8_OVF_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR8_TRG_HALL_IRQHandler
|
||||
.thumb_set TMR8_TRG_HALL_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR8_CH_IRQHandler
|
||||
.thumb_set TMR8_CH_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO1_IRQHandler
|
||||
.thumb_set SDIO1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TMR5_GLOBAL_IRQHandler
|
||||
.thumb_set TMR5_GLOBAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_5_IRQHandler
|
||||
.thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler ,Default_Handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler ,Default_Handler
|
||||
|
||||
.weak CAN2_SE_IRQHandler
|
||||
.thumb_set CAN2_SE_IRQHandler,Default_Handler
|
||||
|
||||
.weak ACC_IRQHandler
|
||||
.thumb_set ACC_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBFS_MAPH_IRQHandler
|
||||
.thumb_set USBFS_MAPH_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBFS_MAPL_IRQHandler
|
||||
.thumb_set USBFS_MAPL_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_7_IRQHandler
|
||||
.thumb_set DMA2_Channel6_7_IRQHandler,Default_Handler
|
||||
@@ -0,0 +1,30 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x1000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,30 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x1000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,30 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x1000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@@ -0,0 +1,496 @@
|
||||
;**************************************************************************
|
||||
;* @file startup_at32f413.s
|
||||
;* @brief at32f413 startup file for IAR Systems
|
||||
;**************************************************************************
|
||||
;
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDT_IRQHandler ; Window Watchdog Timer
|
||||
DCD PVM_IRQHandler ; PVM through EXINT Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD CRM_IRQHandler ; CRM
|
||||
DCD EXINT0_IRQHandler ; EXINT Line 0
|
||||
DCD EXINT1_IRQHandler ; EXINT Line 1
|
||||
DCD EXINT2_IRQHandler ; EXINT Line 2
|
||||
DCD EXINT3_IRQHandler ; EXINT Line 3
|
||||
DCD EXINT4_IRQHandler ; EXINT Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
|
||||
DCD USBFS_H_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USBFS_L_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SE_IRQHandler ; CAN1 SE
|
||||
DCD EXINT9_5_IRQHandler ; EXINT Line [9:5]
|
||||
DCD TMR1_BRK_TMR9_IRQHandler ; TMR1 Brake and TMR9
|
||||
DCD TMR1_OVF_TMR10_IRQHandler ; TMR1 Overflow and TMR10
|
||||
DCD TMR1_TRG_HALL_TMR11_IRQHandler ; TMR1 Trigger and hall and TMR11
|
||||
DCD TMR1_CH_IRQHandler ; TMR1 Channel
|
||||
DCD TMR2_GLOBAL_IRQHandler ; TMR2
|
||||
DCD TMR3_GLOBAL_IRQHandler ; TMR3
|
||||
DCD TMR4_GLOBAL_IRQHandler ; TMR4
|
||||
DCD I2C1_EVT_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ERR_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EVT_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ERR_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXINT15_10_IRQHandler ; EXINT Line [15:10]
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXINT Line
|
||||
DCD USBFSWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
DCD TMR8_BRK_IRQHandler ; TMR8 Brake
|
||||
DCD TMR8_OVF_IRQHandler ; TMR8 Overflow
|
||||
DCD TMR8_TRG_HALL_IRQHandler ; TMR8 Trigger and hall
|
||||
DCD TMR8_CH_IRQHandler ; TMR8 Channel
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDIO1_IRQHandler ; SDIO1
|
||||
DCD TMR5_GLOBAL_IRQHandler ; TMR5
|
||||
DCD 0 ; Reserved
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
||||
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD CAN2_TX_IRQHandler ; CAN2 TX
|
||||
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
|
||||
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
|
||||
DCD CAN2_SE_IRQHandler ; CAN2 SE
|
||||
DCD ACC_IRQHandler ; ACC
|
||||
DCD USBFS_MAPH_IRQHandler ; USB Map HP
|
||||
DCD USBFS_MAPL_IRQHandler ; USB Map LP
|
||||
DCD DMA2_Channel6_7_IRQHandler ; DMA2 Channel6 & Channel7
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK WWDT_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WWDT_IRQHandler
|
||||
B WWDT_IRQHandler
|
||||
|
||||
PUBWEAK PVM_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PVM_IRQHandler
|
||||
B PVM_IRQHandler
|
||||
|
||||
PUBWEAK TAMPER_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TAMPER_IRQHandler
|
||||
B TAMPER_IRQHandler
|
||||
|
||||
PUBWEAK RTC_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_IRQHandler
|
||||
B RTC_IRQHandler
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
PUBWEAK CRM_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CRM_IRQHandler
|
||||
B CRM_IRQHandler
|
||||
|
||||
PUBWEAK EXINT0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT0_IRQHandler
|
||||
B EXINT0_IRQHandler
|
||||
|
||||
PUBWEAK EXINT1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT1_IRQHandler
|
||||
B EXINT1_IRQHandler
|
||||
|
||||
PUBWEAK EXINT2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT2_IRQHandler
|
||||
B EXINT2_IRQHandler
|
||||
|
||||
PUBWEAK EXINT3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT3_IRQHandler
|
||||
B EXINT3_IRQHandler
|
||||
|
||||
PUBWEAK EXINT4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT4_IRQHandler
|
||||
B EXINT4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
PUBWEAK ADC1_2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC1_2_IRQHandler
|
||||
B ADC1_2_IRQHandler
|
||||
|
||||
PUBWEAK USBFS_H_CAN1_TX_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USBFS_H_CAN1_TX_IRQHandler
|
||||
B USBFS_H_CAN1_TX_IRQHandler
|
||||
|
||||
PUBWEAK USBFS_L_CAN1_RX0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USBFS_L_CAN1_RX0_IRQHandler
|
||||
B USBFS_L_CAN1_RX0_IRQHandler
|
||||
|
||||
PUBWEAK CAN1_RX1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CAN1_RX1_IRQHandler
|
||||
B CAN1_RX1_IRQHandler
|
||||
|
||||
PUBWEAK CAN1_SE_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CAN1_SE_IRQHandler
|
||||
B CAN1_SE_IRQHandler
|
||||
|
||||
PUBWEAK EXINT9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT9_5_IRQHandler
|
||||
B EXINT9_5_IRQHandler
|
||||
|
||||
PUBWEAK TMR1_BRK_TMR9_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR1_BRK_TMR9_IRQHandler
|
||||
B TMR1_BRK_TMR9_IRQHandler
|
||||
|
||||
PUBWEAK TMR1_OVF_TMR10_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR1_OVF_TMR10_IRQHandler
|
||||
B TMR1_OVF_TMR10_IRQHandler
|
||||
|
||||
PUBWEAK TMR1_TRG_HALL_TMR11_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR1_TRG_HALL_TMR11_IRQHandler
|
||||
B TMR1_TRG_HALL_TMR11_IRQHandler
|
||||
|
||||
PUBWEAK TMR1_CH_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR1_CH_IRQHandler
|
||||
B TMR1_CH_IRQHandler
|
||||
|
||||
PUBWEAK TMR2_GLOBAL_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR2_GLOBAL_IRQHandler
|
||||
B TMR2_GLOBAL_IRQHandler
|
||||
|
||||
PUBWEAK TMR3_GLOBAL_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR3_GLOBAL_IRQHandler
|
||||
B TMR3_GLOBAL_IRQHandler
|
||||
|
||||
PUBWEAK TMR4_GLOBAL_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR4_GLOBAL_IRQHandler
|
||||
B TMR4_GLOBAL_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_EVT_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_EVT_IRQHandler
|
||||
B I2C1_EVT_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_ERR_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_ERR_IRQHandler
|
||||
B I2C1_ERR_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_EVT_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_EVT_IRQHandler
|
||||
B I2C2_EVT_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_ERR_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_ERR_IRQHandler
|
||||
B I2C2_ERR_IRQHandler
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
PUBWEAK EXINT15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXINT15_10_IRQHandler
|
||||
B EXINT15_10_IRQHandler
|
||||
|
||||
PUBWEAK RTCAlarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTCAlarm_IRQHandler
|
||||
B RTCAlarm_IRQHandler
|
||||
|
||||
PUBWEAK USBFSWakeUp_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USBFSWakeUp_IRQHandler
|
||||
B USBFSWakeUp_IRQHandler
|
||||
|
||||
PUBWEAK TMR8_BRK_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR8_BRK_IRQHandler
|
||||
B TMR8_BRK_IRQHandler
|
||||
|
||||
PUBWEAK TMR8_OVF_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR8_OVF_IRQHandler
|
||||
B TMR8_OVF_IRQHandler
|
||||
|
||||
PUBWEAK TMR8_TRG_HALL_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR8_TRG_HALL_IRQHandler
|
||||
B TMR8_TRG_HALL_IRQHandler
|
||||
|
||||
PUBWEAK TMR8_CH_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR8_CH_IRQHandler
|
||||
B TMR8_CH_IRQHandler
|
||||
|
||||
PUBWEAK SDIO1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SDIO1_IRQHandler
|
||||
B SDIO1_IRQHandler
|
||||
|
||||
PUBWEAK TMR5_GLOBAL_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR5_GLOBAL_IRQHandler
|
||||
B TMR5_GLOBAL_IRQHandler
|
||||
|
||||
PUBWEAK UART4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART4_IRQHandler
|
||||
B UART4_IRQHandler
|
||||
|
||||
PUBWEAK UART5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART5_IRQHandler
|
||||
B UART5_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel1_IRQHandler
|
||||
B DMA2_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel2_IRQHandler
|
||||
B DMA2_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel3_IRQHandler
|
||||
B DMA2_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel4_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel4_5_IRQHandler
|
||||
B DMA2_Channel4_5_IRQHandler
|
||||
|
||||
PUBWEAK CAN2_TX_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CAN2_TX_IRQHandler
|
||||
B CAN2_TX_IRQHandler
|
||||
|
||||
PUBWEAK CAN2_RX0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CAN2_RX0_IRQHandler
|
||||
B CAN2_RX0_IRQHandler
|
||||
|
||||
PUBWEAK CAN2_RX1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CAN2_RX1_IRQHandler
|
||||
B CAN2_RX1_IRQHandler
|
||||
|
||||
PUBWEAK CAN2_SE_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CAN2_SE_IRQHandler
|
||||
B CAN2_SE_IRQHandler
|
||||
|
||||
PUBWEAK ACC_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ACC_IRQHandler
|
||||
B ACC_IRQHandler
|
||||
|
||||
PUBWEAK USBFS_MAPH_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USBFS_MAPH_IRQHandler
|
||||
B USBFS_MAPH_IRQHandler
|
||||
|
||||
PUBWEAK USBFS_MAPL_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USBFS_MAPL_IRQHandler
|
||||
B USBFS_MAPL_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel6_7_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel6_7_IRQHandler
|
||||
B DMA2_Channel6_7_IRQHandler
|
||||
|
||||
END
|
||||
@@ -0,0 +1,357 @@
|
||||
;**************************************************************************
|
||||
;* @file startup_at32f413.s
|
||||
;* @brief at32f413 startup file for keil
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;**************************************************************************
|
||||
;
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDT_IRQHandler ; Window Watchdog Timer
|
||||
DCD PVM_IRQHandler ; PVM through EXINT Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD CRM_IRQHandler ; CRM
|
||||
DCD EXINT0_IRQHandler ; EXINT Line 0
|
||||
DCD EXINT1_IRQHandler ; EXINT Line 1
|
||||
DCD EXINT2_IRQHandler ; EXINT Line 2
|
||||
DCD EXINT3_IRQHandler ; EXINT Line 3
|
||||
DCD EXINT4_IRQHandler ; EXINT Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
|
||||
DCD USBFS_H_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USBFS_L_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SE_IRQHandler ; CAN1 SE
|
||||
DCD EXINT9_5_IRQHandler ; EXINT Line [9:5]
|
||||
DCD TMR1_BRK_TMR9_IRQHandler ; TMR1 Brake and TMR9
|
||||
DCD TMR1_OVF_TMR10_IRQHandler ; TMR1 overflow and TMR10
|
||||
DCD TMR1_TRG_HALL_TMR11_IRQHandler ; TMR1 Trigger and hall and TMR11
|
||||
DCD TMR1_CH_IRQHandler ; TMR1 channel
|
||||
DCD TMR2_GLOBAL_IRQHandler ; TMR2
|
||||
DCD TMR3_GLOBAL_IRQHandler ; TMR3
|
||||
DCD TMR4_GLOBAL_IRQHandler ; TMR4
|
||||
DCD I2C1_EVT_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ERR_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EVT_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ERR_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXINT15_10_IRQHandler ; EXINT Line [15:10]
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXINT Line
|
||||
DCD USBFSWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
DCD TMR8_BRK_IRQHandler ; TMR8 Brake
|
||||
DCD TMR8_OVF_IRQHandler ; TMR8 overflow
|
||||
DCD TMR8_TRG_HALL_IRQHandler ; TMR8 Trigger and hall
|
||||
DCD TMR8_CH_IRQHandler ; TMR8 channel
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDIO1_IRQHandler ; SDIO1
|
||||
DCD TMR5_GLOBAL_IRQHandler ; TMR5
|
||||
DCD 0 ; Reserved
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
||||
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD CAN2_TX_IRQHandler ; CAN2 TX
|
||||
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
|
||||
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
|
||||
DCD CAN2_SE_IRQHandler ; CAN2 SE
|
||||
DCD ACC_IRQHandler ; ACC
|
||||
DCD USBFS_MAPH_IRQHandler ; USB Map High
|
||||
DCD USBFS_MAPL_IRQHandler ; USB Map Low
|
||||
DCD DMA2_Channel6_7_IRQHandler ; DMA2 Channel6 & Channel7
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
IMPORT SystemInit
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDT_IRQHandler [WEAK]
|
||||
EXPORT PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT CRM_IRQHandler [WEAK]
|
||||
EXPORT EXINT0_IRQHandler [WEAK]
|
||||
EXPORT EXINT1_IRQHandler [WEAK]
|
||||
EXPORT EXINT2_IRQHandler [WEAK]
|
||||
EXPORT EXINT3_IRQHandler [WEAK]
|
||||
EXPORT EXINT4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USBFS_H_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USBFS_L_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SE_IRQHandler [WEAK]
|
||||
EXPORT EXINT9_5_IRQHandler [WEAK]
|
||||
EXPORT TMR1_BRK_TMR9_IRQHandler [WEAK]
|
||||
EXPORT TMR1_OVF_TMR10_IRQHandler [WEAK]
|
||||
EXPORT TMR1_TRG_HALL_TMR11_IRQHandler [WEAK]
|
||||
EXPORT TMR1_CH_IRQHandler [WEAK]
|
||||
EXPORT TMR2_GLOBAL_IRQHandler [WEAK]
|
||||
EXPORT TMR3_GLOBAL_IRQHandler [WEAK]
|
||||
EXPORT TMR4_GLOBAL_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EVT_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ERR_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EVT_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ERR_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXINT15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBFSWakeUp_IRQHandler [WEAK]
|
||||
EXPORT TMR8_BRK_IRQHandler [WEAK]
|
||||
EXPORT TMR8_OVF_IRQHandler [WEAK]
|
||||
EXPORT TMR8_TRG_HALL_IRQHandler [WEAK]
|
||||
EXPORT TMR8_CH_IRQHandler [WEAK]
|
||||
EXPORT SDIO1_IRQHandler [WEAK]
|
||||
EXPORT TMR5_GLOBAL_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
|
||||
EXPORT CAN2_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN2_SE_IRQHandler [WEAK]
|
||||
EXPORT ACC_IRQHandler [WEAK]
|
||||
EXPORT USBFS_MAPH_IRQHandler [WEAK]
|
||||
EXPORT USBFS_MAPL_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_7_IRQHandler [WEAK]
|
||||
|
||||
WWDT_IRQHandler
|
||||
PVM_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
CRM_IRQHandler
|
||||
EXINT0_IRQHandler
|
||||
EXINT1_IRQHandler
|
||||
EXINT2_IRQHandler
|
||||
EXINT3_IRQHandler
|
||||
EXINT4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USBFS_H_CAN1_TX_IRQHandler
|
||||
USBFS_L_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SE_IRQHandler
|
||||
EXINT9_5_IRQHandler
|
||||
TMR1_BRK_TMR9_IRQHandler
|
||||
TMR1_OVF_TMR10_IRQHandler
|
||||
TMR1_TRG_HALL_TMR11_IRQHandler
|
||||
TMR1_CH_IRQHandler
|
||||
TMR2_GLOBAL_IRQHandler
|
||||
TMR3_GLOBAL_IRQHandler
|
||||
TMR4_GLOBAL_IRQHandler
|
||||
I2C1_EVT_IRQHandler
|
||||
I2C1_ERR_IRQHandler
|
||||
I2C2_EVT_IRQHandler
|
||||
I2C2_ERR_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXINT15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBFSWakeUp_IRQHandler
|
||||
TMR8_BRK_IRQHandler
|
||||
TMR8_OVF_IRQHandler
|
||||
TMR8_TRG_HALL_IRQHandler
|
||||
TMR8_CH_IRQHandler
|
||||
SDIO1_IRQHandler
|
||||
TMR5_GLOBAL_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_5_IRQHandler
|
||||
CAN2_TX_IRQHandler
|
||||
CAN2_RX0_IRQHandler
|
||||
CAN2_RX1_IRQHandler
|
||||
CAN2_SE_IRQHandler
|
||||
ACC_IRQHandler
|
||||
USBFS_MAPH_IRQHandler
|
||||
USBFS_MAPL_IRQHandler
|
||||
DMA2_Channel6_7_IRQHandler
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
Reference in New Issue
Block a user