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feat: 增加can总线和步进电机指令绑定

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This commit is contained in:
bmy
2024-05-01 12:16:55 +08:00
parent 7ef6f87c84
commit fd047b601c
15 changed files with 190 additions and 345 deletions
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1
project/inc/at32f413_int.h
View File

@@ -65,6 +65,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void USBFS_L_CAN1_RX0_IRQHandler(void);
void TMR4_GLOBAL_IRQHandler(void);
/* add user code begin exported functions */

59
project/inc/at32f413_wk_config.h
View File

@@ -55,65 +55,6 @@ extern "C" {
/* add user code end exported macro */
/* add user code begin dma define */
/* user can only modify the dma define value */
//#define DMA1_CHANNEL1_BUFFER_SIZE 0
//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL2_BUFFER_SIZE 0
//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL3_BUFFER_SIZE 0
//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL4_BUFFER_SIZE 0
//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL5_BUFFER_SIZE 0
//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL6_BUFFER_SIZE 0
//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL7_BUFFER_SIZE 0
//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL1_BUFFER_SIZE 0
//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL2_BUFFER_SIZE 0
//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL3_BUFFER_SIZE 0
//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL4_BUFFER_SIZE 0
//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL5_BUFFER_SIZE 0
//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL6_BUFFER_SIZE 0
//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL7_BUFFER_SIZE 0
//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR 0
/* add user code end dma define */
/* Private defines -------------------------------------------------------------*/
#define MODE2_PIN GPIO_PINS_12
#define MODE2_GPIO_PORT GPIOB

65
project/src/at32f413_int.c
View File

@@ -1,27 +1,27 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f413_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
**************************************************************************
* @file at32f413_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* includes ------------------------------------------------------------------*/
@@ -31,6 +31,7 @@
/* add user code begin private includes */
#include "by_debug.h"
#include "by_stepper.h"
#include "by_messy.h"
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
@@ -205,6 +206,24 @@ void PendSV_Handler(void)
/* add user code end PendSV_IRQ 1 */
}
/**
* @brief this function handles USB Low Priority or CAN1 RX0 handler.
* @param none
* @retval none
*/
void USBFS_L_CAN1_RX0_IRQHandler(void)
{
/* add user code begin USBFS_L_CAN1_RX0_IRQ 0 */
if (SET == can_interrupt_flag_get(CAN1, CAN_RF0MN_FLAG)) {
by_messy_int();
can_flag_clear(CAN1, CAN_RF0MN_FLAG);
}
/* add user code end USBFS_L_CAN1_RX0_IRQ 0 */
/* add user code begin USBFS_L_CAN1_RX0_IRQ 1 */
/* add user code end USBFS_L_CAN1_RX0_IRQ 1 */
}
/**
* @brief this function handles TMR4 handler.
* @param none
@@ -213,7 +232,7 @@ void PendSV_Handler(void)
void TMR4_GLOBAL_IRQHandler(void)
{
/* add user code begin TMR4_GLOBAL_IRQ 0 */
if(SET == tmr_interrupt_flag_get(TMR4, TMR_OVF_FLAG)){
if (SET == tmr_interrupt_flag_get(TMR4, TMR_OVF_FLAG)) {
by_stpepper_int();
tmr_flag_clear(TMR4, TMR_OVF_FLAG);
}

70
project/src/at32f413_wk_config.c
View File

@@ -1,27 +1,27 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f413_wk_config.c
* @brief work bench config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
**************************************************************************
* @file at32f413_wk_config.c
* @brief work bench config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
#include "at32f413_wk_config.h"
@@ -201,6 +201,7 @@ void wk_nvic_config(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
nvic_irq_enable(USBFS_L_CAN1_RX0_IRQn, 0, 0);
nvic_irq_enable(TMR4_GLOBAL_IRQn, 0, 0);
}
@@ -424,7 +425,7 @@ void wk_tmr4_init(void)
/* add user code end tmr4_init 1 */
/* configure counter settings */
tmr_base_init(TMR4, 9999, 1999);
tmr_base_init(TMR4, 9999, 199);
tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR4, FALSE);
@@ -556,17 +557,28 @@ void wk_can1_init(void)
can_filter_init_struct.filter_number = 0;
can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
can_filter_init_struct.filter_id_high = 0x0 << 5;
can_filter_init_struct.filter_id_low = 0x0 << 5;
can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_LIST;
/*Standard identifier + List Mode + Data/Remote frame: id/mask 11bit --------------*/
can_filter_init_struct.filter_id_high = 0x000 << 5;
can_filter_init_struct.filter_id_low = 0x006 << 5;
can_filter_init_struct.filter_mask_high = 0x0 << 5;
can_filter_init_struct.filter_mask_low = 0x0 << 5;
can_filter_init_struct.filter_mask_low = 0x007 << 5;
can_filter_init(CAN1, &can_filter_init_struct);
/* add user code begin can1_init 2 */
/**
* Users need to configure CAN1 interrupt functions according to the actual application.
* 1. Call the below function to enable the corresponding CAN1 interrupt.
* --can_interrupt_enable(...)
* 2. Add the user's interrupt handler code into the below function in the at32f413_int.c file.
* --void USBFS_L_CAN1_RX0_IRQHandler(void)
*/
/*can1 rx0 interrupt config--------------------------------------------------------*/
//can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
/* add user code begin can1_init 2 */
can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
/* add user code end can1_init 2 */
}

11
project/src/main.c
View File

@@ -67,10 +67,10 @@
/* add user code end 0 */
/**
* @brief main function.
* @param none
* @retval none
*/
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
/* add user code begin 1 */
@@ -116,7 +116,8 @@ int main(void)
/* add user code end 2 */
while (1) {
while(1)
{
/* add user code begin 3 */
by_stepper_loop();
/* add user code end 3 */