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feat: 增加一些基础功能

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This commit is contained in:
bmy
2024-05-11 19:37:02 +08:00
parent 2299b60a17
commit f15fcd4b10
22 changed files with 2833 additions and 57 deletions
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71
project/inc/at32f415_wk_config.h
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@@ -55,6 +55,65 @@ extern "C" {
/* add user code end exported macro */
/* add user code begin dma define */
/* user can only modify the dma define value */
//#define DMA1_CHANNEL1_BUFFER_SIZE 0
//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL2_BUFFER_SIZE 0
//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL3_BUFFER_SIZE 0
//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL4_BUFFER_SIZE 0
//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL5_BUFFER_SIZE 0
//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL6_BUFFER_SIZE 0
//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL7_BUFFER_SIZE 0
//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL1_BUFFER_SIZE 0
//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL2_BUFFER_SIZE 0
//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL3_BUFFER_SIZE 0
//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL4_BUFFER_SIZE 0
//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL5_BUFFER_SIZE 0
//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL6_BUFFER_SIZE 0
//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL7_BUFFER_SIZE 0
//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR 0
/* add user code end dma define */
/* exported functions ------------------------------------------------------- */
/* system clock config. */
void wk_system_clock_config(void);
@@ -62,9 +121,21 @@ extern "C" {
/* config periph clock. */
void wk_periph_clock_config(void);
/* init debug function. */
void wk_debug_config(void);
/* nvic config. */
void wk_nvic_config(void);
/* init gpio function. */
void wk_gpio_config(void);
/* init can1 function. */
void wk_can1_init(void);
/* init usart2 function. */
void wk_usart2_init(void);
/* init tmr1 function. */
void wk_tmr1_init(void);