feat: 增加一些基础功能
This commit is contained in:
@@ -161,6 +161,23 @@ void wk_periph_clock_config(void)
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/* enable tmr3 periph clock */
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crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
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/* enable usart2 periph clock */
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crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
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/* enable can1 periph clock */
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crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
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}
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/**
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* @brief init debug function.
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* @param none
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* @retval none
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*/
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void wk_debug_config(void)
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{
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/* jtag-dp disabled and sw-dp enabled */
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gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
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}
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/**
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@@ -171,6 +188,90 @@ void wk_periph_clock_config(void)
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void wk_nvic_config(void)
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{
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nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
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nvic_irq_enable(CAN1_RX0_IRQn, 0, 0);
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}
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/**
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* @brief init gpio_input/gpio_output/gpio_analog/eventout function.
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* @param none
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* @retval none
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*/
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void wk_gpio_config(void)
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{
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/* add user code begin gpio_config 0 */
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/* add user code end gpio_config 0 */
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gpio_init_type gpio_init_struct;
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gpio_default_para_init(&gpio_init_struct);
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/* add user code begin gpio_config 1 */
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/* add user code end gpio_config 1 */
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/* gpio output config */
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gpio_bits_reset(GPIOA, GPIO_PINS_10);
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_10;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* add user code begin gpio_config 2 */
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/* add user code end gpio_config 2 */
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}
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/**
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* @brief init usart2 function
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* @param none
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* @retval none
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*/
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void wk_usart2_init(void)
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{
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/* add user code begin usart2_init 0 */
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/* add user code end usart2_init 0 */
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gpio_init_type gpio_init_struct;
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gpio_default_para_init(&gpio_init_struct);
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/* add user code begin usart2_init 1 */
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/* add user code end usart2_init 1 */
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/* configure the TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_2;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_3;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure param */
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usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
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usart_transmitter_enable(USART2, TRUE);
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usart_receiver_enable(USART2, TRUE);
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usart_parity_selection_config(USART2, USART_PARITY_NONE);
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usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_NONE);
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usart_enable(USART2, TRUE);
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/* add user code begin usart2_init 2 */
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/* add user code end usart2_init 2 */
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}
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/**
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@@ -210,24 +311,8 @@ void wk_tmr1_init(void)
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the CH3 pin */
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gpio_init_struct.gpio_pins = GPIO_PINS_10;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the CH4 pin */
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gpio_init_struct.gpio_pins = GPIO_PINS_11;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure counter settings */
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tmr_base_init(TMR1, 65535, 0);
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tmr_base_init(TMR1, 9999, 287);
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tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
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tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
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tmr_repetition_counter_set(TMR1, 0);
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@@ -238,7 +323,7 @@ void wk_tmr1_init(void)
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tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_RESET);
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/* configure channel 1 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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@@ -249,8 +334,10 @@ void wk_tmr1_init(void)
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tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 0);
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tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
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tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
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/* configure channel 2 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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@@ -261,29 +348,7 @@ void wk_tmr1_init(void)
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tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, 0);
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tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
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/* configure channel 3 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.oc_idle_state = FALSE;
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tmr_output_struct.occ_idle_state = FALSE;
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tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
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tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, 0);
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tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
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/* configure channel 4 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.oc_idle_state = FALSE;
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tmr_output_struct.occ_idle_state = FALSE;
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tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
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tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, 0);
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tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
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tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
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/* configure break and dead-time settings */
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tmr_brkdt_struct.brk_enable = FALSE;
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@@ -325,6 +390,22 @@ void wk_tmr3_init(void)
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/* add user code end tmr3_init 1 */
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/* configure the CH1 pin */
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gpio_init_struct.gpio_pins = GPIO_PINS_6;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the CH2 pin */
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gpio_init_struct.gpio_pins = GPIO_PINS_7;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the CH3 pin */
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gpio_init_struct.gpio_pins = GPIO_PINS_0;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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@@ -342,7 +423,7 @@ void wk_tmr3_init(void)
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gpio_init(GPIOB, &gpio_init_struct);
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/* configure counter settings */
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tmr_base_init(TMR3, 65535, 0);
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tmr_base_init(TMR3, 9999, 287);
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tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
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tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
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tmr_period_buffer_enable(TMR3, FALSE);
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@@ -351,8 +432,36 @@ void wk_tmr3_init(void)
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tmr_sub_sync_mode_set(TMR3, FALSE);
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tmr_primary_mode_select(TMR3, TMR_PRIMARY_SEL_RESET);
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/* configure channel 1 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.oc_idle_state = FALSE;
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tmr_output_struct.occ_idle_state = FALSE;
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tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
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tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, 0);
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tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_1, FALSE);
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tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_1, FALSE);
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/* configure channel 2 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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tmr_output_struct.oc_idle_state = FALSE;
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tmr_output_struct.occ_idle_state = FALSE;
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tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
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tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_2, 0);
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tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_2, FALSE);
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tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_2, FALSE);
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/* configure channel 3 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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@@ -363,8 +472,10 @@ void wk_tmr3_init(void)
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tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_3, 0);
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tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_3, FALSE);
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tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_3, FALSE);
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/* configure channel 4 output settings */
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
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tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
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tmr_output_struct.oc_output_state = TRUE;
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tmr_output_struct.occ_output_state = FALSE;
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tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
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@@ -375,6 +486,8 @@ void wk_tmr3_init(void)
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tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_4, 0);
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tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_4, FALSE);
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tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_4, FALSE);
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tmr_counter_enable(TMR3, TRUE);
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@@ -383,6 +496,92 @@ void wk_tmr3_init(void)
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/* add user code end tmr3_init 2 */
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}
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/**
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* @brief init can1 function.
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* @param none
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* @retval none
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*/
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void wk_can1_init(void)
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{
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/* add user code begin can1_init 0 */
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/* add user code end can1_init 0 */
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gpio_init_type gpio_init_struct;
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can_base_type can_base_struct;
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can_baudrate_type can_baudrate_struct;
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can_filter_init_type can_filter_init_struct;
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/* add user code begin can1_init 1 */
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/* add user code end can1_init 1 */
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/*gpio-----------------------------------------------------------------------------*/
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gpio_default_para_init(&gpio_init_struct);
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/* configure the CAN1 TX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
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gpio_init_struct.gpio_pins = GPIO_PINS_12;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/* configure the CAN1 RX pin */
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
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gpio_init_struct.gpio_pins = GPIO_PINS_11;
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gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
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gpio_init(GPIOA, &gpio_init_struct);
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/*can_base_init--------------------------------------------------------------------*/
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can_default_para_init(&can_base_struct);
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can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
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can_base_struct.ttc_enable = FALSE;
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can_base_struct.aebo_enable = TRUE;
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can_base_struct.aed_enable = TRUE;
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can_base_struct.prsf_enable = FALSE;
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can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
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can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
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can_base_init(CAN1, &can_base_struct);
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/*can_baudrate_setting-------------------------------------------------------------*/
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/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
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can_baudrate_struct.baudrate_div = 18; /*value: 1~0xFFF*/
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can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
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can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
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can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
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can_baudrate_set(CAN1, &can_baudrate_struct);
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/*can_filter_0_config--------------------------------------------------------------*/
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can_filter_init_struct.filter_activate_enable = TRUE;
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can_filter_init_struct.filter_number = 0;
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can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
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can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
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can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
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/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
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can_filter_init_struct.filter_id_high = 0x0 << 5;
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can_filter_init_struct.filter_id_low = 0x0 << 5;
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can_filter_init_struct.filter_mask_high = 0x0 << 5;
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can_filter_init_struct.filter_mask_low = 0x0 << 5;
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can_filter_init(CAN1, &can_filter_init_struct);
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/**
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* Users need to configure CAN1 interrupt functions according to the actual application.
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* 1. Call the below function to enable the corresponding CAN1 interrupt.
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* --can_interrupt_enable(...)
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* 2. Add the user's interrupt handler code into the below function in the at32f415_int.c file.
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* --void CAN1_RX0_IRQHandler(void)
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*/
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/* add user code begin can1_init 2 */
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/* add user code end can1_init 2 */
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}
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/* add user code begin 1 */
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/* add user code end 1 */
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