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bmy
2024-06-10 18:04:45 +08:00
commit 7f47ae4259
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project/MDK_V5/BC5D.uvoptx Normal file
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project/MDK_V5/BC5D.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<Project xsi:noNamespaceSchemaLocation="project_projx.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<Header>### uVision Project, (C) Keil Software</Header>
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<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3/>
<Flash4/>
<pFcarmOut/>
<pFcarmGrp/>
<pFcArmRoot/>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName/>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x10000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector/>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls/>
<Define>AT32F425C8T7,USE_STDPERIPH_DRIVER</Define>
<Undefine/>
<IncludePath>..\..\libraries\drivers\inc;..\..\libraries\cmsis\cm4\core_support;..\..\libraries\cmsis\cm4\device_support;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>1</ClangAsOpt>
<VariousControls>
<MiscControls/>
<Define/>
<Undefine/>
<IncludePath/>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase/>
<ScatterFile/>
<IncludeLibs/>
<IncludeLibsPath/>
<Misc/>
<LinkerInputFile/>
<DisabledWarnings/>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>user</GroupName>
<Files>
<File>
<FileName>at32f425_int.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f425_int.c</FilePath>
</File>
<File>
<FileName>at32f425_wk_config.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f425_wk_config.c</FilePath>
</File>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>firmware</GroupName>
<Files>
<File>
<FileName>at32f425_can.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_can.c</FilePath>
</File>
<File>
<FileName>at32f425_crm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_crm.c</FilePath>
</File>
<File>
<FileName>at32f425_debug.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_debug.c</FilePath>
</File>
<File>
<FileName>at32f425_flash.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_flash.c</FilePath>
</File>
<File>
<FileName>at32f425_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_gpio.c</FilePath>
</File>
<File>
<FileName>at32f425_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_misc.c</FilePath>
</File>
<File>
<FileName>at32f425_pwc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_pwc.c</FilePath>
</File>
<File>
<FileName>at32f425_tmr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_tmr.c</FilePath>
</File>
<File>
<FileName>at32f425_usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f425_usart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cmsis</GroupName>
<Files>
<File>
<FileName>startup_at32f425.s</FileName>
<FileType>2</FileType>
<FilePath>.\startup_at32f425.s</FilePath>
</File>
<File>
<FileName>system_at32f425.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\cmsis\cm4\device_support\system_at32f425.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>BC5D</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

261
project/MDK_V5/startup_at32f425.s Normal file
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;**************************************************************************
;* @file startup_at32f425.s
;* @brief startup_at32f425 startup file for keil
;* <<< Use Configuration Wizard in Context Menu >>>
;**************************************************************************
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDT_IRQHandler ; Window Watchdog Timer
DCD PVM_IRQHandler ; PVM through EXINT Line detect
DCD ERTC_IRQHandler ; ERTC
DCD FLASH_IRQHandler ; Flash
DCD CRM_IRQHandler ; CRM
DCD EXINT1_0_IRQHandler ; EXINT Line 1 & 0
DCD EXINT3_2_IRQHandler ; EXINT Line 3 & 2
DCD EXINT15_4_IRQHandler ; EXINT Line 15 ~ 4
DCD ACC_IRQHandler ; ACC
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel3_2_IRQHandler ; DMA1 Channel 3 & 2
DCD DMA1_Channel7_4_IRQHandler ; DMA1 Channel 7 & 4
DCD ADC1_IRQHandler ; ADC1
DCD TMR1_BRK_OVF_TRG_HALL_IRQHandler ; TMR1 brake overflow trigger and hall
DCD TMR1_CH_IRQHandler ; TMR1 channel
DCD TMR2_GLOBAL_IRQHandler ; TMR2
DCD TMR3_GLOBAL_IRQHandler ; TMR3
DCD TMR6_GLOBAL_IRQHandler ; TMR6
DCD TMR7_GLOBAL_IRQHandler ; TMR7
DCD TMR14_GLOBAL_IRQHandler ; TMR14
DCD TMR15_GLOBAL_IRQHandler ; TMR15
DCD TMR16_GLOBAL_IRQHandler ; TMR16
DCD TMR17_GLOBAL_IRQHandler ; TMR17
DCD I2C1_EVT_IRQHandler ; I2C1 Event
DCD I2C2_EVT_IRQHandler ; I2C2 Event
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART4_3_IRQHandler ; USART3 & USART4
DCD CAN1_IRQHandler ; CAN1
DCD OTGFS1_IRQHandler ; OTGFS1
DCD I2C1_ERR_IRQHandler ; I2C1 Error
DCD SPI3_IRQHandler ; SPI3
DCD I2C2_ERR_IRQHandler ; I2C2 Error
DCD TMR13_GLOBAL_IRQHandler ; TMR13
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVM_IRQHandler [WEAK]
EXPORT ERTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT CRM_IRQHandler [WEAK]
EXPORT EXINT1_0_IRQHandler [WEAK]
EXPORT EXINT3_2_IRQHandler [WEAK]
EXPORT EXINT15_4_IRQHandler [WEAK]
EXPORT ACC_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel3_2_IRQHandler [WEAK]
EXPORT DMA1_Channel7_4_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT TMR1_BRK_OVF_TRG_HALL_IRQHandler [WEAK]
EXPORT TMR1_CH_IRQHandler [WEAK]
EXPORT TMR2_GLOBAL_IRQHandler [WEAK]
EXPORT TMR3_GLOBAL_IRQHandler [WEAK]
EXPORT TMR6_GLOBAL_IRQHandler [WEAK]
EXPORT TMR7_GLOBAL_IRQHandler [WEAK]
EXPORT TMR14_GLOBAL_IRQHandler [WEAK]
EXPORT TMR15_GLOBAL_IRQHandler [WEAK]
EXPORT TMR16_GLOBAL_IRQHandler [WEAK]
EXPORT TMR17_GLOBAL_IRQHandler [WEAK]
EXPORT I2C1_EVT_IRQHandler [WEAK]
EXPORT I2C2_EVT_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART4_3_IRQHandler [WEAK]
EXPORT CAN1_IRQHandler [WEAK]
EXPORT OTGFS1_IRQHandler [WEAK]
EXPORT I2C1_ERR_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT I2C2_ERR_IRQHandler [WEAK]
EXPORT TMR13_GLOBAL_IRQHandler [WEAK]
WWDT_IRQHandler
PVM_IRQHandler
ERTC_IRQHandler
FLASH_IRQHandler
CRM_IRQHandler
EXINT1_0_IRQHandler
EXINT3_2_IRQHandler
EXINT15_4_IRQHandler
ACC_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel3_2_IRQHandler
DMA1_Channel7_4_IRQHandler
ADC1_IRQHandler
TMR1_BRK_OVF_TRG_HALL_IRQHandler
TMR1_CH_IRQHandler
TMR2_GLOBAL_IRQHandler
TMR3_GLOBAL_IRQHandler
TMR6_GLOBAL_IRQHandler
TMR7_GLOBAL_IRQHandler
TMR14_GLOBAL_IRQHandler
TMR15_GLOBAL_IRQHandler
TMR16_GLOBAL_IRQHandler
TMR17_GLOBAL_IRQHandler
I2C1_EVT_IRQHandler
I2C2_EVT_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART4_3_IRQHandler
CAN1_IRQHandler
OTGFS1_IRQHandler
I2C1_ERR_IRQHandler
SPI3_IRQHandler
I2C2_ERR_IRQHandler
TMR13_GLOBAL_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END

147
project/inc/at32f425_conf.h Normal file
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@@ -0,0 +1,147 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f425_conf.h
* @brief at32f425 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F425_CONF_H
#define __AT32F425_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)16000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
/*#define ACC_MODULE_ENABLED----------------------*/
#define CRM_MODULE_ENABLED
#define TMR_MODULE_ENABLED
/*#define ERTC_MODULE_ENABLED---------------------*/
#define GPIO_MODULE_ENABLED
/*#define I2C_MODULE_ENABLED----------------------*/
#define CAN_MODULE_ENABLED
/*#define USB_MODULE_ENABLED----------------------*/
#define USART_MODULE_ENABLED
#define PWC_MODULE_ENABLED
/*#define ADC_MODULE_ENABLED----------------------*/
/*#define SPI_MODULE_ENABLED----------------------*/
/*#define DMA_MODULE_ENABLED----------------------*/
#define DEBUG_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
/*#define CRC_MODULE_ENABLED----------------------*/
/*#define WWDT_MODULE_ENABLED---------------------*/
/*#define WDT_MODULE_ENABLED----------------------*/
/*#define EXINT_MODULE_ENABLED--------------------*/
#define MISC_MODULE_ENABLED
/*#define SCFG_MODULE_ENABLED---------------------*/
/* includes ------------------------------------------------------------------*/
#ifdef ACC_MODULE_ENABLED
#include "at32f425_acc.h"
#endif
#ifdef CRM_MODULE_ENABLED
#include "at32f425_crm.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f425_can.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f425_usb.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f425_tmr.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32f425_ertc.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f425_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f425_i2c.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f425_usart.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f425_pwc.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f425_adc.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f425_spi.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f425_dma.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f425_debug.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f425_flash.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f425_crc.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f425_wwdt.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f425_wdt.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f425_exint.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f425_misc.h"
#endif
#ifdef SCFG_MODULE_ENABLED
#include "at32f425_scfg.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

79
project/inc/at32f425_int.h Normal file
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/* add user code begin Header */
/**
**************************************************************************
* @file at32f425_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F425_INT_H
#define __AT32F425_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f425.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* exported types ------------------------------------------------------------*/
/* add user code begin exported types */
/* add user code end exported types */
/* exported constants --------------------------------------------------------*/
/* add user code begin exported constants */
/* add user code end exported constants */
/* exported macro ------------------------------------------------------------*/
/* add user code begin exported macro */
/* add user code end exported macro */
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void TMR6_GLOBAL_IRQHandler(void);
void TMR7_GLOBAL_IRQHandler(void);
void CAN1_IRQHandler(void);
/* add user code begin exported functions */
/* add user code end exported functions */
#ifdef __cplusplus
}
#endif
#endif

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/* add user code begin Header */
/**
**************************************************************************
* @file at32f425_wk_config.h
* @brief header file of work bench config
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* define to prevent recursive inclusion -----------------------------------*/
#ifndef __AT32F425_WK_CONFIG_H
#define __AT32F425_WK_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes -----------------------------------------------------------------------*/
#include "at32f425.h"
/* private includes -------------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* exported types -------------------------------------------------------------*/
/* add user code begin exported types */
/* add user code end exported types */
/* exported constants --------------------------------------------------------*/
/* add user code begin exported constants */
/* add user code end exported constants */
/* exported macro ------------------------------------------------------------*/
/* add user code begin exported macro */
/* add user code end exported macro */
/* exported functions ------------------------------------------------------- */
/* system clock config. */
void wk_system_clock_config(void);
/* config periph clock. */
void wk_periph_clock_config(void);
/* nvic config. */
void wk_nvic_config(void);
/* init gpio function. */
void wk_gpio_config(void);
/* init can1 function. */
void wk_can1_init(void);
/* init tmr1 function. */
void wk_tmr1_init(void);
/* init tmr2 function. */
void wk_tmr2_init(void);
/* init tmr3 function. */
void wk_tmr3_init(void);
/* init tmr6 function. */
void wk_tmr6_init(void);
/* init tmr7 function. */
void wk_tmr7_init(void);
/* init usart1 function. */
void wk_usart1_init(void);
/* add user code begin exported functions */
/* add user code end exported functions */
#ifdef __cplusplus
}
#endif
#endif

35
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#ifndef _BY_DEBUG_H__
#define _BY_DEBUG_H__
#include <stdio.h>
#include "at32f425.h"
#include "lwprintf.h"
#define BY_DEBUG_USART_INDEX (USART1)
#define BY_DEBUG_LOG_MODE (2) // 0-not log, 1-no debug log, 2-all
#if (BY_DEBUG_LOG_MODE == 2)
#define LOGI(format, ...) lwprintf("[INFO] " format "\r\n", ##__VA_ARGS__)
#define LOGW(format, ...) lwprintf("[WARN] " format "\r\n", ##__VA_ARGS__)
#define LOGE(format, ...) lwprintf("[ERR] " format "\r\n", ##__VA_ARGS__)
#define LOGD(format, ...) lwprintf("[DEBUG] " format "\r\n", ##__VA_ARGS__)
#elif (BY_DEBUG_LOG_MODE == 1)
#define LOGI(format, ...) lwprintf("[INFO] " format "\r\n", ##__VA_ARGS__)
#define LOGW(format, ...) lwprintf("[WARN] " format "\r\n", ##__VA_ARGS__)
#define LOGE(format, ...) lwprintf("[ERR] " format "\r\n", ##__VA_ARGS__)
#define LOGD(format, ...)
#elif (BY_DEBUG_LOG_MODE == 0)
#define LOGI(format, ...)
#define LOGW(format, ...)
#define LOGE(format, ...)
#define LOGD(format, ...)
#endif
extern void by_debug_init(void);
extern void delay_init(void);
extern void delay_us(uint32_t nus);
extern void delay_ms(uint16_t nms);
extern void delay_sec(uint16_t sec);
#endif

264
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/* add user code begin Header */
/**
**************************************************************************
* @file at32f425_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* includes ------------------------------------------------------------------*/
#include "at32f425_int.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
#include "by_debug.h"
#include "by_motion.h"
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */
/* add user code end private typedef */
/* private define ------------------------------------------------------------*/
/* add user code begin private define */
/* add user code end private define */
/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */
/* add user code end private macro */
/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
/* add user code end private variables */
/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */
/* add user code end function prototypes */
/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */
/* add user code end 0 */
/* external variables ---------------------------------------------------------*/
/* add user code begin external variables */
/* add user code end external variables */
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
/* add user code begin NonMaskableInt_IRQ 0 */
/* add user code end NonMaskableInt_IRQ 0 */
/* add user code begin NonMaskableInt_IRQ 1 */
/* add user code end NonMaskableInt_IRQ 1 */
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* add user code begin HardFault_IRQ 0 */
/* add user code end HardFault_IRQ 0 */
/* go to infinite loop when hard fault exception occurs */
while (1) {
/* add user code begin W1_HardFault_IRQ 0 */
/* add user code end W1_HardFault_IRQ 0 */
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* add user code begin MemoryManagement_IRQ 0 */
/* add user code end MemoryManagement_IRQ 0 */
/* go to infinite loop when memory manage exception occurs */
while (1) {
/* add user code begin W1_MemoryManagement_IRQ 0 */
/* add user code end W1_MemoryManagement_IRQ 0 */
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* add user code begin BusFault_IRQ 0 */
/* add user code end BusFault_IRQ 0 */
/* go to infinite loop when bus fault exception occurs */
while (1) {
/* add user code begin W1_BusFault_IRQ 0 */
/* add user code end W1_BusFault_IRQ 0 */
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* add user code begin UsageFault_IRQ 0 */
/* add user code end UsageFault_IRQ 0 */
/* go to infinite loop when usage fault exception occurs */
while (1) {
/* add user code begin W1_UsageFault_IRQ 0 */
/* add user code end W1_UsageFault_IRQ 0 */
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
void SVC_Handler(void)
{
/* add user code begin SVCall_IRQ 0 */
/* add user code end SVCall_IRQ 0 */
/* add user code begin SVCall_IRQ 1 */
/* add user code end SVCall_IRQ 1 */
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
/* add user code begin DebugMonitor_IRQ 0 */
/* add user code end DebugMonitor_IRQ 0 */
/* add user code begin DebugMonitor_IRQ 1 */
/* add user code end DebugMonitor_IRQ 1 */
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
void PendSV_Handler(void)
{
/* add user code begin PendSV_IRQ 0 */
/* add user code end PendSV_IRQ 0 */
/* add user code begin PendSV_IRQ 1 */
/* add user code end PendSV_IRQ 1 */
}
/**
* @brief this function handles TMR6 handler.
* @param none
* @retval none
*/
void TMR6_GLOBAL_IRQHandler(void)
{
/* add user code begin TMR6_GLOBAL_IRQ 0 */
if (SET == tmr_interrupt_flag_get(TMR6, TMR_OVF_FLAG)) {
by_motion_run();
tmr_flag_clear(TMR6, TMR_OVF_FLAG);
}
/* add user code end TMR6_GLOBAL_IRQ 0 */
/* add user code begin TMR6_GLOBAL_IRQ 1 */
/* add user code end TMR6_GLOBAL_IRQ 1 */
}
/**
* @brief this function handles TMR7 handler.
* @param none
* @retval none
*/
void TMR7_GLOBAL_IRQHandler(void)
{
/* add user code begin TMR7_GLOBAL_IRQ 0 */
if (SET == tmr_interrupt_flag_get(TMR7, TMR_OVF_FLAG)) {
by_motion_tmr_handle();
tmr_flag_clear(TMR7, TMR_OVF_FLAG);
}
/* add user code end TMR7_GLOBAL_IRQ 0 */
/* add user code begin TMR7_GLOBAL_IRQ 1 */
/* add user code end TMR7_GLOBAL_IRQ 1 */
}
/**
* @brief this function handles CAN1 handler.
* @param none
* @retval none
*/
void CAN1_IRQHandler(void)
{
/* add user code begin CAN1_IRQ 0 */
if (SET == can_flag_get(CAN1, CAN_RF0MN_FLAG)) {
can_rx_message_type can_rx_message;
can_message_receive(CAN1, CAN_RX_FIFO0, &can_rx_message);
by_motion_can_handle((uint16_t)can_rx_message.standard_id, can_rx_message.data, can_rx_message.dlc);
can_flag_clear(CAN1, CAN_RF0MN_FLAG);
}
/* add user code end CAN1_IRQ 0 */
/* add user code begin CAN1_IRQ 1 */
/* add user code end CAN1_IRQ 1 */
}
/* add user code begin 1 */
/* add user code end 1 */

746
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/* add user code begin Header */
/**
**************************************************************************
* @file at32f425_wk_config.c
* @brief work bench config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
#include "at32f425_wk_config.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */
/* add user code end private typedef */
/* private define ------------------------------------------------------------*/
/* add user code begin private define */
/* add user code end private define */
/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */
/* add user code end private macro */
/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
/* add user code end private variables */
/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */
/* add user code end function prototypes */
/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */
/* add user code end 0 */
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = hext * pll_mult
* system clock source = HEXT_VALUE
* - hext = HEXT_VALUE
* - sclk = 96000000
* - ahbdiv = 1
* - ahbclk = 96000000
* - apb1div = 1
* - apb1clk = 96000000
* - apb2div = 1
* - apb2clk = 96000000
* - pll_mult = 6
* - flash_wtcyc = 2 cycle
* @param none
* @retval none
*/
void wk_system_clock_config(void)
{
/* reset crm */
crm_reset();
/* config flash psr register */
flash_psr_set(FLASH_WAIT_CYCLE_2);
/* enable lick */
crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
/* wait till lick is ready */
while (crm_flag_get(CRM_LICK_STABLE_FLAG) != SET) {
}
/* enable hext */
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while (crm_hext_stable_wait() == ERROR) {
}
/* enable hick */
crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
/* wait till hick is ready */
while (crm_flag_get(CRM_HICK_STABLE_FLAG) != SET) {
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HEXT, CRM_PLL_MULT_6);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while (crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) {
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk */
crm_apb2_div_set(CRM_APB2_DIV_1);
/* config apb1clk */
crm_apb1_div_set(CRM_APB1_DIV_1);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while (crm_sysclk_switch_status_get() != CRM_SCLK_PLL) {
}
/* update system_core_clock global variable */
system_core_clock_update();
}
/**
* @brief config periph clock
* @param none
* @retval none
*/
void wk_periph_clock_config(void)
{
/* enable gpioa periph clock */
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
/* enable gpiob periph clock */
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
/* enable gpiof periph clock */
crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
/* enable tmr1 periph clock */
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
/* enable usart1 periph clock */
crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
/* enable tmr2 periph clock */
crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
/* enable tmr3 periph clock */
crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
/* enable tmr6 periph clock */
crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
/* enable tmr7 periph clock */
crm_periph_clock_enable(CRM_TMR7_PERIPH_CLOCK, TRUE);
/* enable can1 periph clock */
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
}
/**
* @brief nvic config
* @param none
* @retval none
*/
void wk_nvic_config(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
nvic_irq_enable(TMR6_GLOBAL_IRQn, 0, 0);
nvic_irq_enable(TMR7_GLOBAL_IRQn, 0, 0);
nvic_irq_enable(CAN1_IRQn, 0, 0);
}
/**
* @brief init gpio_input/gpio_output/gpio_analog/eventout function.
* @param none
* @retval none
*/
void wk_gpio_config(void)
{
/* add user code begin gpio_config 0 */
/* add user code end gpio_config 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin gpio_config 1 */
/* add user code end gpio_config 1 */
/* gpio input config */
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOB, &gpio_init_struct);
/* gpio output config */
gpio_bits_reset(GPIOA, GPIO_PINS_12);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_12;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
/* add user code begin gpio_config 2 */
/* add user code end gpio_config 2 */
}
/**
* @brief init tmr1 function.
* @param none
* @retval none
*/
void wk_tmr1_init(void)
{
/* add user code begin tmr1_init 0 */
/* add user code end tmr1_init 0 */
gpio_init_type gpio_init_struct;
tmr_output_config_type tmr_output_struct;
tmr_brkdt_config_type tmr_brkdt_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr1_init 1 */
/* add user code end tmr1_init 1 */
/* configure the tmr1 CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_8;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_2);
/* configure the tmr1 CH2 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_9;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_2);
/* configure the tmr1 CH3 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_10;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_2);
/* configure the tmr1 CH4 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_11;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_2);
/* configure counter settings */
tmr_base_init(TMR1, 999, 5);
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
tmr_repetition_counter_set(TMR1, 0);
tmr_period_buffer_enable(TMR1, FALSE);
/* configure primary mode settings */
tmr_sub_sync_mode_set(TMR1, FALSE);
tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_RESET);
/* configure channel 1 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 0);
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
/* configure channel 2 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, 0);
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
/* configure channel 3 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, 0);
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
/* configure channel 4 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, 0);
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
/* configure break and dead-time settings */
tmr_brkdt_struct.brk_enable = FALSE;
tmr_brkdt_struct.auto_output_enable = FALSE;
tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW;
tmr_brkdt_struct.fcsoen_state = FALSE;
tmr_brkdt_struct.fcsodis_state = FALSE;
tmr_brkdt_struct.wp_level = TMR_WP_OFF;
tmr_brkdt_struct.deadtime = 0;
tmr_brkdt_config(TMR1, &tmr_brkdt_struct);
tmr_brk_filter_value_set(TMR1, 0);
tmr_output_enable(TMR1, TRUE);
tmr_counter_enable(TMR1, TRUE);
/* add user code begin tmr1_init 2 */
/* add user code end tmr1_init 2 */
}
/**
* @brief init tmr2 function.
* @param none
* @retval none
*/
void wk_tmr2_init(void)
{
/* add user code begin tmr2_init 0 */
/* add user code end tmr2_init 0 */
gpio_init_type gpio_init_struct;
tmr_input_config_type tmr_input_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr2_init 1 */
/* add user code end tmr2_init 1 */
/* configure the tmr2 CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_0;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_2);
/* configure the tmr2 CH2 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_1;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_2);
/* configure counter settings */
tmr_base_init(TMR2, 65535, 0);
tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR2, FALSE);
/* configure primary mode settings */
tmr_sub_sync_mode_set(TMR2, FALSE);
tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_RESET);
/* configure encoder mode */
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_1;
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
tmr_input_struct.input_filter_value = 0;
tmr_input_channel_init(TMR2, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
tmr_input_struct.input_filter_value = 0;
tmr_input_channel_init(TMR2, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
tmr_encoder_mode_config(TMR2, TMR_ENCODER_MODE_A, TMR_INPUT_RISING_EDGE, TMR_INPUT_RISING_EDGE);
tmr_counter_enable(TMR2, TRUE);
/* add user code begin tmr2_init 2 */
/* add user code end tmr2_init 2 */
}
/**
* @brief init tmr3 function.
* @param none
* @retval none
*/
void wk_tmr3_init(void)
{
/* add user code begin tmr3_init 0 */
/* add user code end tmr3_init 0 */
gpio_init_type gpio_init_struct;
tmr_input_config_type tmr_input_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr3_init 1 */
/* add user code end tmr3_init 1 */
/* configure the tmr3 CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_6;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_1);
/* configure the tmr3 CH2 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_7;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_1);
/* configure counter settings */
tmr_base_init(TMR3, 65535, 0);
tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR3, FALSE);
/* configure primary mode settings */
tmr_sub_sync_mode_set(TMR3, FALSE);
tmr_primary_mode_select(TMR3, TMR_PRIMARY_SEL_RESET);
/* configure encoder mode */
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_1;
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
tmr_input_struct.input_filter_value = 0;
tmr_input_channel_init(TMR3, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
tmr_input_struct.input_filter_value = 0;
tmr_input_channel_init(TMR3, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
tmr_encoder_mode_config(TMR3, TMR_ENCODER_MODE_A, TMR_INPUT_RISING_EDGE, TMR_INPUT_RISING_EDGE);
tmr_counter_enable(TMR3, TRUE);
/* add user code begin tmr3_init 2 */
/* add user code end tmr3_init 2 */
}
/**
* @brief init tmr6 function.
* @param none
* @retval none
*/
void wk_tmr6_init(void)
{
/* add user code begin tmr6_init 0 */
/* add user code end tmr6_init 0 */
/* add user code begin tmr6_init 1 */
/* add user code end tmr6_init 1 */
/* configure counter settings */
tmr_base_init(TMR6, 1999, 959);
tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
tmr_period_buffer_enable(TMR6, FALSE);
/* configure primary mode settings */
tmr_primary_mode_select(TMR6, TMR_PRIMARY_SEL_RESET);
tmr_counter_enable(TMR6, TRUE);
/**
* Users need to configure TMR6 interrupt functions according to the actual application.
* 1. Call the below function to enable the corresponding TMR6 interrupt.
* --tmr_interrupt_enable(...)
* 2. Add the user's interrupt handler code into the below function in the at32f425_int.c file.
* --void TMR6_GLOBAL_IRQHandler(void)
*/
/* add user code begin tmr6_init 2 */
tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
/* add user code end tmr6_init 2 */
}
/**
* @brief init tmr7 function.
* @param none
* @retval none
*/
void wk_tmr7_init(void)
{
/* add user code begin tmr7_init 0 */
/* add user code end tmr7_init 0 */
/* add user code begin tmr7_init 1 */
/* add user code end tmr7_init 1 */
/* configure counter settings */
tmr_base_init(TMR7, 99, 19199);
tmr_cnt_dir_set(TMR7, TMR_COUNT_UP);
tmr_period_buffer_enable(TMR7, FALSE);
/* configure primary mode settings */
tmr_primary_mode_select(TMR7, TMR_PRIMARY_SEL_RESET);
tmr_counter_enable(TMR7, TRUE);
/**
* Users need to configure TMR7 interrupt functions according to the actual application.
* 1. Call the below function to enable the corresponding TMR7 interrupt.
* --tmr_interrupt_enable(...)
* 2. Add the user's interrupt handler code into the below function in the at32f425_int.c file.
* --void TMR7_GLOBAL_IRQHandler(void)
*/
/* add user code begin tmr7_init 2 */
tmr_interrupt_enable(TMR7, TMR_OVF_INT, TRUE);
/* add user code end tmr7_init 2 */
}
/**
* @brief init usart1 function
* @param none
* @retval none
*/
void wk_usart1_init(void)
{
/* add user code begin usart1_init 0 */
/* add user code end usart1_init 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin usart1_init 1 */
/* add user code end usart1_init 1 */
/* configure the TX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_6;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOB, &gpio_init_struct);
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_0);
/* configure the RX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_7;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOB, &gpio_init_struct);
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE7, GPIO_MUX_0);
/* configure param */
usart_init(USART1, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
usart_transmitter_enable(USART1, TRUE);
usart_receiver_enable(USART1, TRUE);
usart_parity_selection_config(USART1, USART_PARITY_NONE);
usart_hardware_flow_control_set(USART1, USART_HARDWARE_FLOW_NONE);
usart_enable(USART1, TRUE);
/* add user code begin usart1_init 2 */
/* add user code end usart1_init 2 */
}
/**
* @brief init can1 function.
* @param none
* @retval none
*/
void wk_can1_init(void)
{
/* add user code begin can1_init 0 */
/* add user code end can1_init 0 */
gpio_init_type gpio_init_struct;
can_base_type can_base_struct;
can_baudrate_type can_baudrate_struct;
can_filter_init_type can_filter_init_struct;
/* add user code begin can1_init 1 */
/* add user code end can1_init 1 */
/*gpio-----------------------------------------------------------------------------*/
gpio_default_para_init(&gpio_init_struct);
/* configure the CAN1 TX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_3;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_4);
/* configure the CAN1 RX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_2;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_4);
/*can_base_init--------------------------------------------------------------------*/
can_default_para_init(&can_base_struct);
can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
can_base_struct.ttc_enable = FALSE;
can_base_struct.aebo_enable = TRUE;
can_base_struct.aed_enable = TRUE;
can_base_struct.prsf_enable = FALSE;
can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
can_base_init(CAN1, &can_base_struct);
/*can_baudrate_setting-------------------------------------------------------------*/
/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/
can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
can_baudrate_set(CAN1, &can_baudrate_struct);
/*can_filter_0_config--------------------------------------------------------------*/
can_filter_init_struct.filter_activate_enable = TRUE;
can_filter_init_struct.filter_number = 0;
can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
can_filter_init_struct.filter_id_high = 0x0 << 5;
can_filter_init_struct.filter_id_low = 0x0 << 5;
can_filter_init_struct.filter_mask_high = 0x0 << 5;
can_filter_init_struct.filter_mask_low = 0x0 << 5;
can_filter_init(CAN1, &can_filter_init_struct);
/**
* Users need to configure CAN1 interrupt functions according to the actual application.
* 1. Call the below function to enable the corresponding CAN1 interrupt.
* --can_interrupt_enable(...)
* 2. Add the user's interrupt handler code into the below function in the at32f402_405_int.c file.
* --void CAN1_IRQHandler(void)
*/
/* add user code begin can1_init 2 */
can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
/* add user code end can1_init 2 */
}
/* add user code begin 1 */
/* add user code end 1 */

98
project/src/by_debug.c Normal file
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#include "by_debug.h"
#include "at32f425.h"
#include "lwprintf.h"
/* delay macros */
#define STEP_DELAY_MS 50
/* delay variable */
static __IO uint32_t fac_us;
static __IO uint32_t fac_ms;
int lwprintf_out(int ch, lwprintf_t *lwp)
{
/* May use printf to output it for test */
if (ch != '\0') {
while (usart_flag_get(BY_DEBUG_USART_INDEX, USART_TDC_FLAG) == RESET);
usart_data_transmit(BY_DEBUG_USART_INDEX, (char)ch);
}
return ch;
}
void by_debug_init(void)
{
lwprintf_init(lwprintf_out);
}
void delay_init(void)
{
systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8);
crm_clocks_freq_type clocks;
crm_clocks_freq_get(&clocks);
fac_us = clocks.sclk_freq / (8000000U);
fac_ms = fac_us * (1000U);
}
/**
* @brief inserts a delay time.
* @param nus: specifies the delay time length, in microsecond.
* @retval none
*/
void delay_us(uint32_t nus)
{
uint32_t temp = 0;
SysTick->LOAD = (uint32_t)(nus * fac_us);
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
do {
temp = SysTick->CTRL;
} while ((temp & 0x01) && !(temp & (1 << 16)));
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0x00;
}
/**
* @brief inserts a delay time.
* @param nms: specifies the delay time length, in milliseconds.
* @retval none
*/
void delay_ms(uint16_t nms)
{
uint32_t temp = 0;
while (nms) {
if (nms > STEP_DELAY_MS) {
SysTick->LOAD = (uint32_t)(STEP_DELAY_MS * fac_ms);
nms -= STEP_DELAY_MS;
} else {
SysTick->LOAD = (uint32_t)(nms * fac_ms);
nms = 0;
}
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
do {
temp = SysTick->CTRL;
} while ((temp & 0x01) && !(temp & (1 << 16)));
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0x00;
}
}
/**
* @brief inserts a delay time.
* @param sec: specifies the delay time, in seconds.
* @retval none
*/
void delay_sec(uint16_t sec)
{
uint16_t index;
for (index = 0; index < sec; index++) {
delay_ms(500);
delay_ms(500);
}
}

124
project/src/main.c Normal file
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@@ -0,0 +1,124 @@
/* add user code begin Header */
/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* Includes ------------------------------------------------------------------*/
#include "at32f425_wk_config.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
#include "by_debug.h"
#include "by_motion.h"
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */
/* add user code end private typedef */
/* private define ------------------------------------------------------------*/
/* add user code begin private define */
/* add user code end private define */
/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */
/* add user code end private macro */
/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
/* add user code end private variables */
/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */
/* add user code end function prototypes */
/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */
/* add user code end 0 */
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
/* add user code begin 1 */
by_debug_init();
/* add user code end 1 */
/* system clock config. */
wk_system_clock_config();
/* config periph clock. */
wk_periph_clock_config();
/* nvic config. */
wk_nvic_config();
/* init usart1 function. */
wk_usart1_init();
/* init can1 function. */
wk_can1_init();
/* init gpio function. */
wk_gpio_config();
/* init tmr1 function. */
wk_tmr1_init();
/* init tmr2 function. */
wk_tmr2_init();
/* init tmr3 function. */
wk_tmr3_init();
/* init tmr6 function. */
wk_tmr6_init();
/* init tmr7 function. */
wk_tmr7_init();
/* add user code begin 2 */
delay_init();
LOGD("init delay");
by_motion_init();
LOGD("init motion");
/* add user code end 2 */
while(1)
{
/* add user code begin 3 */
lwprintf("%f, %f, %f\r\n", param_m1.real_speed, param_m1.target_speed, param_m1.out_pwm);
/* add user code end 3 */
}
}