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QD4C-firmware/libraries/zf_driver/zf_driver_pwm.c

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2023-12-11 21:45:06 +08:00
/*********************************************************************************************************************
* CH32V307VCT6 Opensourec Library <EFBFBD><EFBFBD><EFBFBD><EFBFBD>CH32V307VCT6 <EFBFBD><EFBFBD>Դ<EFBFBD>⣩<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڹٷ<EFBFBD> SDK <EFBFBD>ӿڵĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>
* Copyright (c) 2022 SEEKFREE <EFBFBD><EFBFBD><EFBFBD>ɿƼ<EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>CH32V307VCT6 <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* CH32V307VCT6 <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᷢ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> GPL<EFBFBD><EFBFBD>GNU General Public License<EFBFBD><EFBFBD><EFBFBD><EFBFBD> GNUͨ<EFBFBD>ù<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> GPL <EFBFBD>ĵ<EFBFBD>3<EFBFBD>棨<EFBFBD><EFBFBD> GPL3.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>κκ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD>ķ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κεı<EFBFBD>֤
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ի<EFBFBD><EFBFBD>ʺ<EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD>;<EFBFBD>ı<EFBFBD>֤
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>μ<EFBFBD> GPL
*
* <EFBFBD><EFBFBD>Ӧ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬʱ<EFBFBD>յ<EFBFBD>һ<EFBFBD><EFBFBD> GPL <EFBFBD>ĸ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><https://www.gnu.org/licenses/>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD> GPL3.0 <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤Э<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>İ汾
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӣ<EFBFBD>İ<EFBFBD><EFBFBD><EFBFBD> libraries/doc <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD> GPL3_permission_statement.txt <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> libraries <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD> LICENSE <EFBFBD>ļ<EFBFBD>
* <EFBFBD><EFBFBD>ӭ<EFBFBD><EFBFBD>λʹ<EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD>뱣<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<EFBFBD><EFBFBD>İ<EFBFBD>Ȩ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> zf_driver_pwm
* <EFBFBD><EFBFBD>˾<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD>ɶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>޹<EFBFBD>˾
* <EFBFBD>汾<EFBFBD><EFBFBD>Ϣ <EFBFBD>鿴 libraries/doc <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> version <EFBFBD>ļ<EFBFBD> <EFBFBD>汾˵<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> MounRiver Studio V1.8.1
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ̨ CH32V307VCT6
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
*
* <EFBFBD>޸ļ<EFBFBD>¼
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ע
* 2022-09-15 <EFBFBD><EFBFBD>W first version
********************************************************************************************************************/
#include "zf_driver_gpio.h"
#include "zf_driver_timer.h"
#include "zf_driver_pwm.h"
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PWMռ<4D>ձ<EFBFBD><D5B1>趨
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> pwmch PWMͨ<4D><CDA8><EFBFBD>ż<EFBFBD><C5BC><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> duty PWMռ<4D>ձ<EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> pwm_set_duty(TIM10_PWM_CH4_C15, 5000); //<2F><>ʱ<EFBFBD><CAB1>10 ͨ<><CDA8>4 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>C15 ռ<>ձ<EFBFBD>Ϊ<EFBFBD>ٷ<EFBFBD>֮ 5000/PWM_DUTY_MAX*100
// PWM_DUTY_MAX<41><58>zf_pwm.h<>ļ<EFBFBD><C4BC><EFBFBD> Ĭ<><C4AC>Ϊ10000
//-------------------------------------------------------------------------------------------------------------------
void pwm_set_duty(pwm_channel_enum pin, uint32 duty)
{
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>б<EFBFBD><D0B1><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>ձ<EFBFBD><D5B1><EFBFBD><EFBFBD>޶<EFBFBD><DEB6>Ķ<EFBFBD><C4B6><EFBFBD> ռ<>ձ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
zf_assert(PWM_DUTY_MAX >= duty); // ռ<>ձ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
TIM_TypeDef *tim_index = TIM1;
switch((pin & 0xF0000) >> 16) // <20><>ȡTIM<49><4D><EFBFBD><EFBFBD>
{
case 0: tim_index = TIM1; break;
case 1: tim_index = TIM2; break;
case 2: tim_index = TIM3; break;
case 3: tim_index = TIM4; break;
case 4: tim_index = TIM5; break;
case 7: tim_index = TIM8; break;
case 8: tim_index = TIM9; break;
case 9: tim_index = TIM10; break;
}
uint16 match_temp;
uint16 period_temp;
period_temp = tim_index->ATRLR; // <20><>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
match_temp = period_temp * duty / PWM_DUTY_MAX; // ռ<>ձ<EFBFBD>
if(((pin>>8) & 0x03) == 0x00) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH1CVR = match_temp;
}
else if(((pin>>8) & 0x03) == 0x01) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH2CVR = match_temp;
}
else if(((pin>>8) & 0x03) == 0x02) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH3CVR = match_temp;
}
else if(((pin>>8) & 0x03) == 0x03) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH4CVR = match_temp;
}
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PWMƵ<4D><C6B5><EFBFBD>趨
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> pwmch PWMͨ<4D><CDA8><EFBFBD>ż<EFBFBD><C5BC><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> freq PWMƵ<4D><C6B5>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> duty PWMռ<4D>ձ<EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> pwm_set_freq(PWM1_CH1_A8, 60, 5000); //ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>A8 <20><><EFBFBD><EFBFBD>PWMƵ<4D><C6B5>60HZ ռ<>ձ<EFBFBD>Ϊ<EFBFBD>ٷ<EFBFBD>֮ 5000/PWM_DUTY_MAX*100
// PWM_DUTY_MAX<41><58>zf_pwm.h<>ļ<EFBFBD><C4BC><EFBFBD> Ĭ<><C4AC>Ϊ10000
//-------------------------------------------------------------------------------------------------------------------
void pwm_set_freq(pwm_channel_enum pin, uint32 freq, uint32 duty)
{
uint16 period_temp = 0; // <20><><EFBFBD><EFBFBD>ֵ
uint16 freq_div = 0; // <20><>Ƶֵ
uint16 match_temp;
freq_div = (uint16)((system_clock / freq) >> 16); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٷ<EFBFBD>Ƶ
period_temp = (uint16)(system_clock/(freq*(freq_div + 1))); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><>ȡTIM<49><4D><EFBFBD><EFBFBD>
TIM_TypeDef *tim_index = TIM1;
switch((pin & 0xF0000) >> 16)
{
case 0: tim_index = TIM1; break;
case 1: tim_index = TIM2; break;
case 2: tim_index = TIM3; break;
case 3: tim_index = TIM4; break;
case 4: tim_index = TIM5; break;
case 7: tim_index = TIM8; break;
case 8: tim_index = TIM9; break;
case 9: tim_index = TIM10; break;
}
tim_index->ATRLR = period_temp - 1 ;
tim_index->PSC = freq_div;
match_temp = period_temp * duty / PWM_DUTY_MAX; // ռ<>ձ<EFBFBD>
if(((pin>>8) & 0x03) == 0x00) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH1CVR = match_temp;
}
else if(((pin>>8) & 0x03) == 0x01) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH2CVR = match_temp;
}
else if(((pin>>8) & 0x03) == 0x02) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH3CVR = match_temp;
}
else if(((pin>>8) & 0x03) == 0x03) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
tim_index->CH4CVR = match_temp;
}
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PWM<57><4D>ʼ<EFBFBD><CABC>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> pwmch PWMͨ<4D><CDA8><EFBFBD>ż<EFBFBD><C5BC><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> freq PWMƵ<4D><C6B5>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> duty PWMռ<4D>ձ<EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> pwm_init(PWM1_CH1_A8, 50, 5000); //<2F><>ʼ<EFBFBD><CABC>PWM1 ͨ<><CDA8>1 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>A8 <20><><EFBFBD><EFBFBD>PWMƵ<4D><C6B5>50HZ ռ<>ձ<EFBFBD>Ϊ<EFBFBD>ٷ<EFBFBD>֮ 5000/PWM_DUTY_MAX*100
// PWM_DUTY_MAX<41><58>zf_pwm.h<>ļ<EFBFBD><C4BC><EFBFBD> Ĭ<><C4AC>Ϊ10000
//-------------------------------------------------------------------------------------------------------------------
void pwm_init(pwm_channel_enum pin, uint32 freq, uint32 duty)
{
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˶<EFBFBD><CBB6><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><>ȥ<EFBFBD>鿴<EFBFBD><E9BFB4><EFBFBD><EFBFBD>ʲô<CAB2>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD><EFBFBD>Ǽ<EFBFBD><C7BC><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>ظ<EFBFBD>ʹ<EFBFBD>ö<EFBFBD>ʱ<EFBFBD><CAB1>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD> TIM1_PIT Ȼ<><C8BB><EFBFBD>ֳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD> TIM1_PWM <20><><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD><C3B7>Dz<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
zf_assert(timer_funciton_check((timer_index_enum)(pin>>16), TIMER_FUNCTION_PWM));
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>б<EFBFBD><D0B1><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>ձ<EFBFBD><D5B1><EFBFBD><EFBFBD>޶<EFBFBD><DEB6>Ķ<EFBFBD><C4B6><EFBFBD> ռ<>ձ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
zf_assert(PWM_DUTY_MAX >= duty);
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure = {0};
TIM_OCInitTypeDef TIM_OCInitStructure = {0};
uint16 match_temp; // ռ<>ձ<EFBFBD>ֵ
uint16 period_temp; // <20><><EFBFBD><EFBFBD>ֵ
uint16 freq_div = 0; // <20><>Ƶֵ
timer_clock_enable((pin & 0xF0000) >> 16); // <20><>ʱ<EFBFBD><CAB1>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9>
gpio_init((gpio_pin_enum)(pin & 0xFF), GPO, 0, GPO_AF_PUSH_PULL | SPEED_50MHZ); // <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // ʹ<><CAB9>AFIO<49><4F><EFBFBD>ù<EFBFBD><C3B9><EFBFBD>ģ<EFBFBD><C4A3>ʱ<EFBFBD><CAB1>
// <20><>ȡTIM<49><4D><EFBFBD><EFBFBD>
TIM_TypeDef *tim_index = TIM1;
switch((pin & 0xF0000) >> 16)
{
case 0: tim_index = TIM1; break;
case 1: tim_index = TIM2; break;
case 2: tim_index = TIM3; break;
case 3: tim_index = TIM4; break;
case 4: tim_index = TIM5; break;
case 7: tim_index = TIM8; break;
case 8: tim_index = TIM9; break;
case 9: tim_index = TIM10; break;
}
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ù<EFBFBD><C3B9><EFBFBD>
if((pin >> 12) == 0x03) GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE);
else if((pin >> 12) == 0x11) GPIO_PinRemapConfig(GPIO_PartialRemap1_TIM2, ENABLE);
else if((pin >> 12) == 0x12) GPIO_PinRemapConfig(GPIO_PartialRemap2_TIM2, ENABLE);
else if((pin >> 12) == 0x13) GPIO_PinRemapConfig(GPIO_FullRemap_TIM2, ENABLE);
else if((pin >> 12) == 0x22) GPIO_PinRemapConfig(GPIO_PartialRemap_TIM3, ENABLE);
else if((pin >> 12) == 0x23) GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE);
else if((pin >> 12) == 0x31) GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
else if((pin >> 12) == 0x71) GPIO_PinRemapConfig(GPIO_Remap_TIM8, ENABLE);
else if((pin >> 12) == 0x83) GPIO_PinRemapConfig(GPIO_FullRemap_TIM9, ENABLE);
else if((pin >> 12) == 0x91) GPIO_PinRemapConfig(GPIO_PartialRemap_TIM10, ENABLE);
else if((pin >> 12) == 0x93) GPIO_PinRemapConfig(GPIO_FullRemap_TIM10, ENABLE);
freq_div = (uint16)((system_clock / freq) >> 16); // <20><><EFBFBD>ٷ<EFBFBD>Ƶ
period_temp = (uint16)(system_clock/(freq*(freq_div + 1))); // <20><><EFBFBD><EFBFBD>
match_temp = period_temp * duty / PWM_DUTY_MAX; // ռ<>ձ<EFBFBD>
TIM_TimeBaseStructure.TIM_Period = period_temp - 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>װ<EFBFBD><D7B0><EFBFBD><EFBFBD><EEB6AF><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>װ<EFBFBD>ؼĴ<D8BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ֵ
TIM_TimeBaseStructure.TIM_Prescaler = freq_div; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪTIMxʱ<78><CAB1>Ƶ<EFBFBD>ʳ<EFBFBD><CAB3><EFBFBD><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>Ƶֵ
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; // <20><><EFBFBD><EFBFBD>ʱ<EFBFBD>ӷָ<D3B7>:TDTS = Tck_tim
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; // TIM<49><4D><EFBFBD>ϼ<EFBFBD><CFBC><EFBFBD>ģʽ
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(tim_index, &TIM_TimeBaseStructure); // <20><><EFBFBD><EFBFBD>TIM_TimeBaseInitStruct<63><74>ָ<EFBFBD><D6B8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>TIMx<4D><78>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2; // ѡ<><D1A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ģʽ:TIM<49><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD>ģʽ2
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; // <20>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputState_Disable;
TIM_OCInitStructure.TIM_Pulse = match_temp;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>Ƚϼ<C8BD><CFBC>Ե<EFBFBD>
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCPolarity_Low; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>Ƚϼ<C8BD><CFBC>Ե<EFBFBD>
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
if(((pin>>8) & 0x03) == 0x00) // ͨ<><CDA8>ѡ<EFBFBD><D1A1>
{
TIM_OC1Init(tim_index, &TIM_OCInitStructure ); // <20><>ʱ<EFBFBD><CAB1>ͨ<EFBFBD><CDA8>1<EFBFBD><31>ʼ<EFBFBD><CABC>
TIM_OC1PreloadConfig(tim_index, TIM_OCPreload_Enable); // <20><>ʱ<EFBFBD><CAB1>Ԥװ<D4A4><D7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
TIM_OC1FastConfig(tim_index, TIM_OC1FE); // <20>Ƚϲ<C8BD><CFB2><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
}
else if(((pin>>8) & 0x03) == 0x01)
{
TIM_OC2Init(tim_index, &TIM_OCInitStructure );
TIM_OC2PreloadConfig(tim_index, TIM_OCPreload_Enable);
TIM_OC2FastConfig(tim_index, TIM_OC2FE);
}
else if(((pin>>8) & 0x03) == 0x02)
{
TIM_OC3Init(tim_index, &TIM_OCInitStructure );
TIM_OC3PreloadConfig(tim_index, TIM_OCPreload_Enable);
TIM_OC3FastConfig(tim_index, TIM_OC3FE);
}
else if(((pin>>8) & 0x03) == 0x03)
{
TIM_OC4Init(tim_index, &TIM_OCInitStructure );
TIM_OC4PreloadConfig(tim_index, TIM_OCPreload_Enable);
TIM_OC4FastConfig(tim_index, TIM_OC4FE);
}
TIM_CtrlPWMOutputs(tim_index, ENABLE ); // ͨ<><CDA8>PWM<57><4D><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
TIM_Cmd(tim_index, ENABLE); // <20><>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9>
//TIM_ARRPreloadConfig( TIM1, ENABLE );
}
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