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feat: 根据新板卡QD4C更新时钟配置

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硬件上更换为 16MHz 的外部晶振，将PLL输入源更改为二分频之后的HSE，后续倍频系数不变（仅更改了144MHz下的配置）
This commit is contained in:
bmy
2024-04-15 23:08:37 +08:00
parent fbed8b272e
commit 75b9cc4a8f
2 changed files with 7 additions and 7 deletions
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12
libraries/zf_common/zf_common_clock.c
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@@ -2,11 +2,11 @@
* CH32V307VCT6 Opensourec Library <20><><EFBFBD><EFBFBD>CH32V307VCT6 <20><>Դ<EFBFBD>⣩<EFBFBD><E2A3A9>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ڹٷ<DAB9> SDK <20>ӿڵĵ<DAB5><C4B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>
* Copyright (c) 2022 SEEKFREE <20><><EFBFBD>ɿƼ<C9BF>
*
* <20><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>CH32V307VCT6 <20><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>
* <20><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> CH32V307VCT6 <20><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>
*
* CH32V307VCT6 <20><>Դ<EFBFBD><D4B4> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᷢ<EFBFBD><E1B7A2><EFBFBD><EFBFBD> GPL<50><4C>GNU General Public License<73><65><EFBFBD><EFBFBD> GNUͨ<55>ù<EFBFBD><C3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><> GPL <20>ĵ<EFBFBD>3<EFBFBD>棨<EFBFBD><EFBFBD> GPL3.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>κκ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD>޸<EFBFBD><DEB8><EFBFBD>
* <20><><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᷢ<EFBFBD><E1B7A2><EFBFBD><EFBFBD> GPL<50><4C>GNU General Public License<73><65><EFBFBD><EFBFBD> GNU ͨ<EFBFBD>ù<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><> GPL <20>ĵ<EFBFBD> 3 <EFBFBD>棨<EFBFBD><EFBFBD> GPL3.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>κκ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD>޸<EFBFBD><DEB8><EFBFBD>
*
* <20><><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD>ܷ<EFBFBD><DCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κεı<CEB5>֤
* <20><><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ի<EFBFBD><D4BB>ʺ<EFBFBD><CABA>ض<EFBFBD><D8B6><EFBFBD>;<EFBFBD>ı<EFBFBD>֤
@@ -30,7 +30,7 @@
*
* <20>޸ļ<DEB8>¼
* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><>ע
* 2022-09-15 <20><>W first version
* 2022-09-15 <20><> W first version
********************************************************************************************************************/
#include "ch32v30x.h"
@@ -48,7 +48,7 @@ uint32 system_clock = SYSTEM_CLOCK_144M; // ϵͳʱ
//-------------------------------------------------------------------------------------------------------------------
void clock_reset(void)
{
RCC->CTLR |= (uint32) 0x00000001; //ʹ<><CAB9>HSI<53><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
RCC->CTLR |= (uint32) 0x00000001; //ʹ<><CAB9> HSI <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
RCC->CFGR0 &= (uint32) 0xF8FF0000;
RCC->CTLR &= (uint32) 0xFEF6FFFF;
RCC->CTLR &= (uint32) 0xFFFBFFFF;
@@ -105,7 +105,7 @@ void clock_set_freq(uint32 clock)
| RCC_PLLMULL));
if (clock == SYSTEM_CLOCK_144M)
RCC->CFGR0 |= (uint32) (RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE
RCC->CFGR0 |= (uint32) (RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE_Div2
| RCC_PLLMULL18_EXTEN);
else if (clock == SYSTEM_CLOCK_120M)
RCC->CFGR0 |= (uint32) (RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE