btl143/QDAC-firmware
4
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
Files
4e577da7077b6306c37a085d1a5da1e29b3541d2
QDAC-firmware/libraries/zf_driver/zf_driver_uart.c

293 lines
12 KiB
C
Raw Normal View History

first commit
2023-12-11 21:45:06 +08:00
/*********************************************************************************************************************
* CH32V307VCT6 Opensourec Library <EFBFBD><EFBFBD><EFBFBD><EFBFBD>CH32V307VCT6 <EFBFBD><EFBFBD>Դ<EFBFBD>⣩<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڹٷ<EFBFBD> SDK <EFBFBD>ӿڵĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>
* Copyright (c) 2022 SEEKFREE <EFBFBD><EFBFBD><EFBFBD>ɿƼ<EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>CH32V307VCT6 <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* CH32V307VCT6 <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᷢ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> GPL<EFBFBD><EFBFBD>GNU General Public License<EFBFBD><EFBFBD><EFBFBD><EFBFBD> GNUͨ<EFBFBD>ù<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> GPL <EFBFBD>ĵ<EFBFBD>3<EFBFBD>棨<EFBFBD><EFBFBD> GPL3.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>κκ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD>ķ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κεı<EFBFBD>֤
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ի<EFBFBD><EFBFBD>ʺ<EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD>;<EFBFBD>ı<EFBFBD>֤
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>μ<EFBFBD> GPL
*
* <EFBFBD><EFBFBD>Ӧ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬʱ<EFBFBD>յ<EFBFBD>һ<EFBFBD><EFBFBD> GPL <EFBFBD>ĸ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><https://www.gnu.org/licenses/>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD> GPL3.0 <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤Э<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>İ汾
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӣ<EFBFBD>İ<EFBFBD><EFBFBD><EFBFBD> libraries/doc <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD> GPL3_permission_statement.txt <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> libraries <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD> LICENSE <EFBFBD>ļ<EFBFBD>
* <EFBFBD><EFBFBD>ӭ<EFBFBD><EFBFBD>λʹ<EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD>뱣<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<EFBFBD><EFBFBD>İ<EFBFBD>Ȩ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> zf_driver_uart
* <EFBFBD><EFBFBD>˾<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD>ɶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>޹<EFBFBD>˾
* <EFBFBD>汾<EFBFBD><EFBFBD>Ϣ <EFBFBD>鿴 libraries/doc <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> version <EFBFBD>ļ<EFBFBD> <EFBFBD>汾˵<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> MounRiver Studio V1.8.1
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ̨ CH32V307VCT6
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
*
* <EFBFBD>޸ļ<EFBFBD>¼
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ע
* 2022-09-15 <EFBFBD><EFBFBD>W first version
********************************************************************************************************************/
#include "zf_driver_gpio.h"
#include "zf_driver_uart.h"
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD>޸ģ<DEB8><C4A3>ڲ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
const uint8 uart_irq[] = {USART1_IRQn, USART2_IRQn, USART3_IRQn, UART4_IRQn, UART5_IRQn, UART6_IRQn, UART7_IRQn, UART8_IRQn};
const uint32 uart_index[] = {USART1_BASE, USART2_BASE, USART3_BASE, UART4_BASE, UART5_BASE, UART6_BASE, UART7_BASE, UART8_BASE};
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> dat <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_write_byte(UART_1, 0x43); //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>0x43<34><33>
//-------------------------------------------------------------------------------------------------------------------
void uart_write_byte(uart_index_enum uartn, const uint8 dat)
{
while((((USART_TypeDef*)uart_index[uartn])->STATR & USART_FLAG_TXE)==0);
((USART_TypeDef*)uart_index[uartn])->DATAR = dat;
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> buff Ҫ<><D2AA><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> len <20><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_write_buffer(UART_1, buff, 10); //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>10<31><30>buff<66><66><EFBFBD>顣
//-------------------------------------------------------------------------------------------------------------------
void uart_write_buffer(uart_index_enum uartn, const uint8 *buff, uint32 len)
{
zf_assert(buff != NULL);
while(len--)
uart_write_byte(uartn, *buff++);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> str <20>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>׵<EFBFBD>ַ
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_putstr(UART_1, (uint8 *)"12345") //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>12345<34><35><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>
//-------------------------------------------------------------------------------------------------------------------
void uart_write_string(uart_index_enum uartn, const char *str)
{
zf_assert(str != NULL);
while(*str) // һֱѭ<D6B1><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>β
{
uart_write_byte(uartn, *str++);
}
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>򿪴<EFBFBD><F2BFAAB4>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD>ж<EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> status ʹ<>ܻ<EFBFBD><DCBB><EFBFBD>ʧ<EFBFBD><CAA7>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_rx_irq(UART_1, ENABLE); //<2F>򿪴<EFBFBD><F2BFAAB4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
//-------------------------------------------------------------------------------------------------------------------
void uart_rx_interrupt(uart_index_enum uartn, uint8 status)
{
USART_ITConfig(((USART_TypeDef*)uart_index[uartn]), USART_IT_RXNE, status);
// <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>
interrupt_set_priority((uint32)((IRQn_Type)uart_irq[uartn]), 0);
if(status) interrupt_enable((IRQn_Type)uart_irq[uartn]);
else interrupt_disable((IRQn_Type)uart_irq[uartn]);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>򿪴<EFBFBD><F2BFAAB4>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD>ж<EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> status ʹ<>ܻ<EFBFBD><DCBB><EFBFBD>ʧ<EFBFBD><CAA7>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_tx_irq(UART_1, DISABLE); //<2F>رմ<D8B1><D5B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> <20>ж<EFBFBD>
//-------------------------------------------------------------------------------------------------------------------
void uart_tx_interrupt(uart_index_enum uartn, uint8 status)
{
USART_ITConfig(((USART_TypeDef*)uart_index[uartn]), USART_IT_TXE, status);
// <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>
interrupt_set_priority((uint32)((IRQn_Type)uart_irq[uartn]), 0);
if(status) interrupt_enable((IRQn_Type)uart_irq[uartn]);
else interrupt_disable((IRQn_Type)uart_irq[uartn]);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ȡ<EFBFBD><C8A1><EFBFBD>ڽ<EFBFBD><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݣ<EFBFBD>whlie<69>ȴ<EFBFBD><C8B4><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>(UART_1 - UART_8)
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *dat <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵĵ<DDB5>ַ
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uint8 dat; uart_read_byte(USART_1,&dat); // <20><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>dat<61><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//-------------------------------------------------------------------------------------------------------------------
uint8 uart_read_byte(uart_index_enum uartn)
{
while((((USART_TypeDef*)uart_index[uartn])->STATR & USART_FLAG_RXNE) == 0);
return (((USART_TypeDef*)uart_index[uartn])->DATAR & (uint16)0xFF);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ȡ<EFBFBD><C8A1><EFBFBD>ڽ<EFBFBD><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>գ<EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>(UART_1 - UART_8)
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *dat <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵĵ<DDB5>ַ
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> uint8 1<><31><EFBFBD><EFBFBD><EFBFBD>ճɹ<D5B3> 0<><30>δ<EFBFBD><CEB4><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uint8 dat; uart_query_byte(USART_1,&dat); // <20><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>dat<61><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//-------------------------------------------------------------------------------------------------------------------
uint8 uart_query_byte(uart_index_enum uartn, uint8 *dat)
{
if((((USART_TypeDef*)uart_index[uartn])->STATR & USART_FLAG_RXNE) != 0)
{
*dat = (((USART_TypeDef*)uart_index[uartn])->DATAR & 0xFF);
return 1;
}
return 0;
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> baud <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> tx_pin <20><><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> rx_pin <20><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_init(UART_1, 115200, UART1_TX_A9, UART1_RX_A10); //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>,TXΪA9,RXΪA10
//-------------------------------------------------------------------------------------------------------------------
void uart_init(uart_index_enum uart_n, uint32 baud, uart_pin_enum tx_pin, uart_pin_enum rx_pin)
{
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˶<EFBFBD><CBB6><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><>ȥ<EFBFBD>鿴<EFBFBD><E9BFB4><EFBFBD><EFBFBD>ʲô<CAB2>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// RX<52><58>TX<54><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ͬһ<CDAC><D2BB>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD><C5A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ<EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
zf_assert((tx_pin & (uart_n << 12)) == (rx_pin & (uart_n << 12))); // tx_pin <20><> rx_pin <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> uart_n ƥ<><C6A5>
zf_assert((tx_pin >> 8) == (rx_pin >> 8)); // tx_pin <20><> rx_pin <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>鴫<EFBFBD><E9B4AB>
gpio_init(tx_pin & 0xFF, GPO, 0, GPO_AF_PUSH_PULL);
gpio_init(rx_pin & 0xFF, GPI, 0, GPI_PULL_UP);
// AFIO<49><4F><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
switch(tx_pin & 0xFFFF)
{
case UART1_MAP1_TX_B6:
AFIO->PCFR2 &= ~(0x01<<26);
AFIO->PCFR1 &= ~(0x01<<2);
AFIO->PCFR1 |= (0x01<<2);
break;
case UART1_MAP2_TX_B15:
AFIO->PCFR2 &= ~(0x01<<26);
AFIO->PCFR2 |= (0x01<<26);
AFIO->PCFR1 &= ~(0x01<<2);
break;
case UART1_MAP3_TX_A6:
AFIO->PCFR2 &= ~(0x01<<26);
AFIO->PCFR2 |= (0x01<<26);
AFIO->PCFR1 &= ~(0x01<<2);
AFIO->PCFR1 |= (0x01<<2);
break;
case UART2_MAP1_TX_D5:
AFIO->PCFR1 &= ~(0x01<<3);
AFIO->PCFR1 |= (0x01<<3);
break;
case UART3_MAP1_TX_C10:
AFIO->PCFR1 &= ~(0x03<<4);
AFIO->PCFR1 |= (0x01<<4);
break;
case UART3_MAP2_TX_D8:
AFIO->PCFR1 &= ~(0x03<<4);
AFIO->PCFR1 |= (0x03<<4);
break;
case UART4_MAP1_TX_B0:
AFIO->PCFR2 &= ~(0x03<<16);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 16);
break;
case UART4_MAP3_TX_E0:
AFIO->PCFR2 &= ~(0x03<<16);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 16);
break;
case UART5_MAP1_TX_B4:
AFIO->PCFR2 &= ~(0x03<<18);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 18);
break;
case UART5_MAP3_TX_E8:
AFIO->PCFR2 &= ~(0x03<<18);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 18);
break;
case UART6_MAP1_TX_B8:
AFIO->PCFR2 &= ~(0x03<<20);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 20);
break;
case UART6_MAP3_TX_E10:
AFIO->PCFR2 &= ~(0x03<<20);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 20);
break;
case UART7_MAP1_TX_A6:
AFIO->PCFR2 &= ~(0x03<<22);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 22);
break;
case UART7_MAP3_TX_E12:
AFIO->PCFR2 &= ~(0x03<<22);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 22);
break;
case UART8_MAP1_TX_A14:
AFIO->PCFR2 &= ~(0x03<<24);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 24);
break;
case UART8_MAP3_TX_E14:
AFIO->PCFR2 &= ~(0x03<<24);
AFIO->PCFR2 |= (((tx_pin >> 8) & 0x03 ) << 24);
break;
}
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
if(UART_1 == uart_n) RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
else if(UART_2 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
else if(UART_3 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
else if(UART_4 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
else if(UART_5 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
else if(UART_6 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART6, ENABLE);
else if(UART_7 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART7, ENABLE);
else if(UART_8 == uart_n) RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART8, ENABLE);
// <20><><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
USART_InitTypeDef USART_InitStructure = {0};
USART_InitStructure.USART_BaudRate = baud;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
// ʹ<>ܴ<EFBFBD><DCB4><EFBFBD>
USART_Init((USART_TypeDef*)uart_index[uart_n], &USART_InitStructure);
USART_Cmd((USART_TypeDef*)uart_index[uart_n], ENABLE);
}
Reference in New Issue Copy Permalink